公开(公告)号：US20190088298A1

公开(公告)日：2019-03-21

申请号：US15918399

申请日：2018-03-12

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Kosuke HATSUDA ,  Yoshiaki OSADA ,  Yorinobu FUJINO ,  Jieyun ZHOU

IPC: G11C11/16

CPC classification number: G11C11/1673 ,  G11C11/161 ,  G11C11/1675 ,  G11C11/1693 ,  G11C13/004 ,  G11C13/0061 ,  G11C2013/0057 ,  H01F10/3254 ,  H01L27/228 ,  H01L43/08 ,  H01L43/10

Abstract: According to one embodiment, a memory device includes a preamplifier configured to execute a first read in which a first current relating to a memory cell is passed through a first path and a second current relating to the first current is passed through a second path, to generate a first voltage, to write first data to the memory cell; and to execute a second read in which a third current relating to the memory cell with the first data written thereto is passed through the first path and a fourth current relating to the third current is passed through the second path, to generate a second voltage; and a sense amplifier configured to determine data stored in the memory cell during execution of the first read based on the first voltage and the second voltage.