公开(公告)号：US20200161331A1

公开(公告)日：2020-05-21

申请号：US16750237

申请日：2020-01-23

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Katsumi YAMAMOTO ,  Keisuke KIKUTANI

IPC: H01L27/11582 ,  H01L29/06 ,  H01L21/762 ,  H01L21/311

Abstract: A semiconductor device includes a substrate, a stacked body provided on the substrate, a first insulator dividing the stacked body in a second direction crossing the first direction, a second insulator adjacent to the first insulator and dividing the stacked body in the second direction, a first hole, and a first insulating member. In the stacked body, a plurality of layers are stacked in a first direction perpendicular to the upper surface of the substrate. The first hole penetrates the stacked body and the first insulator in the first direction. The first insulating member penetrates the stacked body and the second insulator in the first direction and is adjacent to the first hole via a first electrode in a third direction crossing the first direction and the second direction, and has an opening diameter larger than that of the first insulator.

公开(公告)号：US20190259609A1

公开(公告)日：2019-08-22

申请号：US16031535

申请日：2018-07-10

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Kazuhito FURUMOTO ,  Keisuke KIKUTANI ,  Soichi YAMAZAKI

IPC: H01L21/02 ,  H01L27/11563 ,  H01L21/28 ,  H01L21/033 ,  H01L21/302

Abstract: According to one embodiment, a method for producing a semiconductor device includes forming a first film on a substrate. A second film is formed on the first film. A recess is formed in the second film. First processing by which a third film is formed on the second film to form a side face of the recess with the second film and second processing by which the first film exposed in the recess is processed by using the second and third films, are executed one or more times. In relation to an N-th (N is an integer greater than or equal to 1) first processing, before the third film is formed on the second film, a surface inclined with respect to the side face of the recess is formed above the side face of the recess.

公开(公告)号：US20190296036A1

公开(公告)日：2019-09-26

申请号：US16105892

申请日：2018-08-20

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Katsumi YAMAMOTO ,  Keisuke KIKUTANI

IPC: H01L27/11582 ,  H01L29/06 ,  H01L21/762 ,  H01L21/311

Abstract: A semiconductor device includes a substrate, a stacked body provided on the substrate, a first insulator dividing the stacked body in a second direction crossing the first direction, a second insulator adjacent to the first insulator and dividing the stacked body in the second direction, a first hole, and a first insulating member. In the stacked body, a plurality of layers are stacked in a first direction perpendicular to the upper surface of the substrate. The first hole penetrates the stacked body and the first insulator in the first direction. The first insulating member penetrates the stacked body and the second insulator in the first direction and is adjacent to the first hole via a first electrode in a third direction crossing the first direction and the second direction, and has an opening diameter larger than that of the first insulator.

公开(公告)号：US20180261466A1

公开(公告)日：2018-09-13

申请号：US15695918

申请日：2017-09-05

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Soichi YAMAZAKI ,  Kazuhito FURUMOTO ,  Kosuke HORIBE ,  Keisuke KIKUTANI ,  Atsuko SAKATA ,  Junichi WADA ,  Toshiyuki SASAKI

IPC: H01L21/311 ,  H01L21/033 ,  H01L21/3213

Abstract: A method of manufacturing a semiconductor device includes forming a mask layer including aluminum or an aluminum compound on a layer to be etched comprising at least one first metal selected from tungsten, tantalum, zirconium, hafnium, molybdenum, niobium, ruthenium, osmium, rhenium, and iridium. The method of manufacturing a semiconductor device further includes patterning the mask layer, and etching the layer to be etched by using the patterned mask layer to form a hole or a groove in the layer to be etched.

公开(公告)号：US20180145086A1

公开(公告)日：2018-05-24

申请号：US15661243

申请日：2017-07-27

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Kaori NARUMIYA ,  Hisataka HAYASHI ,  Keisuke KIKUTANI ,  Akio UI ,  Yosuke SATO

IPC: H01L27/11582 ,  H01L21/311 ,  H01L21/3213

CPC classification number: H01L27/11582 ,  H01J37/32706 ,  H01J2237/334 ,  H01L21/31116 ,  H01L21/32136 ,  H01L21/32137 ,  H01L27/1157 ,  H01L27/11575

Abstract: A dry etching method includes a process of, while continuously applying bias power using an ion species to a material to be processed including a first conductive member, a first insulating film provided on the first conductive member, a second conductive member provided on the first insulating film, and a second insulating film provided on the second conductive member, dry etching the second insulating film to expose the second conductive member. A time for which the bias power is continuously applied is set to 50 microseconds or less and a duty ratio of the bias power is set to 50% or less.