WAFER ALIGNMENT STRUCTURE
    3.
    发明公开

    公开(公告)号:US20240234333A9

    公开(公告)日:2024-07-11

    申请号:US18548433

    申请日:2022-02-23

    Applicant: Tesla, Inc.

    CPC classification number: H01L23/544 H01L23/367 H01L2223/54426

    Abstract: A system on a wafer (SoW) assembly is disclosed. The SoW assembly can include a first SoW assembly structure with a first coefficient of thermal expansion (CTE). The first SoW assembly structure includes first to third slots at different locations. The SoW assembly can include a second SoW assembly structure stacked on the first SoW assembly structure. The second SoW assembly structure has a second CTE different from the first CTE. The second SoW assembly structure has first to third pins extending therefrom and disposed in the first to third slots. The first and second slots shaped to allow the first and second pins to move along a first axis, and the third slot shaped to allow the third pin to move along a second axis. The first SoW assembly structure can be a SoW and the second SoW assembly structure can be a heat dissipation structure in certain applications.

    SANDWICHED MULTI-LAYER STRUCTURE FOR COOLING HIGH POWER ELECTRONICS

    公开(公告)号:US20250087557A1

    公开(公告)日:2025-03-13

    申请号:US18580580

    申请日:2022-08-16

    Applicant: Tesla, Inc.

    Abstract: The systems, methods, and devices disclosed herein relate to sandwiched multi-layer structures for cooling electronics. In some embodiments, a computing assembly can include a first cooling system, a first electronics layer, a second cooling system, and a second electronics layer. The first cooling system can be disposed on top of and can be in thermal communication with the first electronics layer, the first electronics layer can be disposed on top of and can be in thermal communication with the second cooling system, and the second cooling system can be disposed on top of and can be in thermal communication with the second electronics layer. In some embodiments, at least one layer can use system on wafer packaging.

    WAFER ALIGNMENT STRUCTURE
    5.
    发明公开

    公开(公告)号:US20240136303A1

    公开(公告)日:2024-04-25

    申请号:US18548433

    申请日:2022-02-23

    Applicant: Tesla, Inc.

    CPC classification number: H01L23/544 H01L23/367 H01L2223/54426

    Abstract: A system on a wafer (SoW) assembly is disclosed. The SoW assembly can include a first SoW assembly structure with a first coefficient of thermal expansion (CTE). The first SoW assembly structure includes first to third slots at different locations. The SoW assembly can include a second SoW assembly structure stacked on the first SoW assembly structure. The second SoW assembly structure has a second CTE different from the first CTE. The second SoW assembly structure has first to third pins extending therefrom and disposed in the first to third slots. The first and second slots shaped to allow the first and second pins to move along a first axis, and the third slot shaped to allow the third pin to move along a second axis. The first SoW assembly structure can be a SoW and the second SoW assembly structure can be a heat dissipation structure in certain applications.

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