-
公开(公告)号:US11973004B2
公开(公告)日:2024-04-30
申请号:US17277893
申请日:2019-09-19
Applicant: Tesla, Inc.
Inventor: Robert Yinan Cao , Mitchell Heschke , Mengzhi Pang , Shishuang Sun , Vijaykumar Krithivasan
IPC: H01L23/40 , H01L23/498 , H01L25/00 , H01L25/065
CPC classification number: H01L23/4006 , H01L23/49822 , H01L23/49838 , H01L25/0652 , H01L25/50 , H01L2023/4081 , H01L2023/4087
Abstract: Described is a multi-chip module that may include a Redistribution Layer (RDL) substrate having Integrated Circuit (IC) dies mounted to a first surface of the RDL substrate. A second plurality of IC dies may be mounted to an opposite second surface. A plurality of sockets can be mounted upon the second plurality of IC dies and a cold plate then mounted to the first plurality of IC dies. The mounting structure may include socket frames coupled to the plurality of sockets.
-
公开(公告)号:US20240356255A1
公开(公告)日:2024-10-24
申请号:US18683758
申请日:2022-08-12
Applicant: Tesla, Inc.
Inventor: Rishabh Bhandari , Yong guo Li , Mohamed Haitham Helmy Nasr , Samuel Lichy , Aydin Nabovati , Shiva Farzinazar , Mitchell Heschke
CPC classification number: H01R12/716 , H01R13/2421 , H01R13/46 , H05K7/20927
Abstract: An array of compliant connectors for electronic assemblies is provided. In one aspect, a system includes an array of first electronic components and an array of second electronic components. Each of the second electronic components is paired with corresponding to one of the first electronic components. Each pair of the first and second electronic components is coupled via a plurality of compliant connectors.
-
公开(公告)号:US20240234333A9
公开(公告)日:2024-07-11
申请号:US18548433
申请日:2022-02-23
Applicant: Tesla, Inc.
Inventor: Yong guo Li , Rishabh Bhandari , Aydin Nabovati , Ron Rosenberg , Vijaykumar Krithivasan , Mitchell Heschke
IPC: H01L23/544 , H01L23/367
CPC classification number: H01L23/544 , H01L23/367 , H01L2223/54426
Abstract: A system on a wafer (SoW) assembly is disclosed. The SoW assembly can include a first SoW assembly structure with a first coefficient of thermal expansion (CTE). The first SoW assembly structure includes first to third slots at different locations. The SoW assembly can include a second SoW assembly structure stacked on the first SoW assembly structure. The second SoW assembly structure has a second CTE different from the first CTE. The second SoW assembly structure has first to third pins extending therefrom and disposed in the first to third slots. The first and second slots shaped to allow the first and second pins to move along a first axis, and the third slot shaped to allow the third pin to move along a second axis. The first SoW assembly structure can be a SoW and the second SoW assembly structure can be a heat dissipation structure in certain applications.
-
公开(公告)号:US20250087557A1
公开(公告)日:2025-03-13
申请号:US18580580
申请日:2022-08-16
Applicant: Tesla, Inc.
Inventor: Aydin Nabovati , Mitchell Heschke , Zheng Gao , Vijaykumar Krithivasan , Mohamed Haitham Helmy Nasr
IPC: H01L23/473 , H01L25/065
Abstract: The systems, methods, and devices disclosed herein relate to sandwiched multi-layer structures for cooling electronics. In some embodiments, a computing assembly can include a first cooling system, a first electronics layer, a second cooling system, and a second electronics layer. The first cooling system can be disposed on top of and can be in thermal communication with the first electronics layer, the first electronics layer can be disposed on top of and can be in thermal communication with the second cooling system, and the second cooling system can be disposed on top of and can be in thermal communication with the second electronics layer. In some embodiments, at least one layer can use system on wafer packaging.
-
公开(公告)号:US20240136303A1
公开(公告)日:2024-04-25
申请号:US18548433
申请日:2022-02-23
Applicant: Tesla, Inc.
Inventor: Yong guo Li , Rishabh Bhandari , Aydin Nabovati , Ron Rosenberg , Vijaykumar Krithivasan , Mitchell Heschke
IPC: H01L23/544 , H01L23/367
CPC classification number: H01L23/544 , H01L23/367 , H01L2223/54426
Abstract: A system on a wafer (SoW) assembly is disclosed. The SoW assembly can include a first SoW assembly structure with a first coefficient of thermal expansion (CTE). The first SoW assembly structure includes first to third slots at different locations. The SoW assembly can include a second SoW assembly structure stacked on the first SoW assembly structure. The second SoW assembly structure has a second CTE different from the first CTE. The second SoW assembly structure has first to third pins extending therefrom and disposed in the first to third slots. The first and second slots shaped to allow the first and second pins to move along a first axis, and the third slot shaped to allow the third pin to move along a second axis. The first SoW assembly structure can be a SoW and the second SoW assembly structure can be a heat dissipation structure in certain applications.
-
公开(公告)号:US20210351104A1
公开(公告)日:2021-11-11
申请号:US17277893
申请日:2019-09-19
Applicant: Tesla, Inc.
Inventor: Robert Yinan Cao , Mitchell Heschke , Mengzhi Pang , Shishuang Sun , Vijaykumar Krithivasan
IPC: H01L23/40 , H01L25/065 , H01L23/498 , H01L25/00
Abstract: Described is a multi-chip module that may include a Redistribution Layer (RDL) substrate having Integrated Circuit (IC) dies mounted to a first surface of the RDL substrate. A second plurality of IC dies may be mounted to an opposite second surface. A plurality of sockets can be mounted upon the second plurality of IC dies and a cold plate then mounted to the first plurality of IC dies. The mounting structure may include socket frames coupled to the plurality of sockets.
-
-
-
-
-