公开(公告)号：US11367680B2

公开(公告)日：2022-06-21

申请号：US16766616

申请日：2018-11-30

Applicant: Tesla, Inc.

Inventor： Mengzhi Pang ,  Shishuang Sun ,  Ganesh Venkataramanan

IPC: H01L23/522 ,  H01L25/065 ,  H01L23/36 ,  H01L21/48 ,  H01L23/498 ,  H01L23/538

Abstract: An electronic assembly (100) includes a mechanical carrier (102), a plurality of integrated circuits (104A, 104B) disposed on the mechanical carrier, a fan out package (108) disposed on the plurality of integrated circuits, a plurality of singulated substrates (112A, 112B) disposed on the fan out package, a plurality of electronic components (114A, 114B) disposed on the plurality of singulated substrates, and at least one stiffness ring (116A, 116B, 116C) disposed on the plurality of singulated substrates. A method for constructing an electronic assembly includes identifying a group of known good singulated substrates, joining the group of known good singulated substrates into a substrate panel, attaching at least one bridge to the substrate panel that electrically couples at least two of the known good singulated substrates, and mounting a plurality of electronic components onto the substrate panel, each electronic component of the plurality of electronic components corresponding to a respective known good singulated substrate.

公开(公告)号：US11973004B2

公开(公告)日：2024-04-30

申请号：US17277893

申请日：2019-09-19

Applicant: Tesla, Inc.

Inventor： Robert Yinan Cao ,  Mitchell Heschke ,  Mengzhi Pang ,  Shishuang Sun ,  Vijaykumar Krithivasan

IPC: H01L23/40 ,  H01L23/498 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L23/4006 ,  H01L23/49822 ,  H01L23/49838 ,  H01L25/0652 ,  H01L25/50 ,  H01L2023/4081 ,  H01L2023/4087

Abstract: Described is a multi-chip module that may include a Redistribution Layer (RDL) substrate having Integrated Circuit (IC) dies mounted to a first surface of the RDL substrate. A second plurality of IC dies may be mounted to an opposite second surface. A plurality of sockets can be mounted upon the second plurality of IC dies and a cold plate then mounted to the first plurality of IC dies. The mounting structure may include socket frames coupled to the plurality of sockets.

公开(公告)号：US20220392836A1

公开(公告)日：2022-12-08

申请号：US17807475

申请日：2022-06-17

Applicant: Tesla, Inc.

Inventor： Mengzhi Pang ,  Shishuang Sun ,  Ganesh Venkataramanan

IPC: H01L23/522 ,  H01L21/48 ,  H01L23/36 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065

Abstract: An electronic assembly includes a mechanical carrier, a plurality of integrated circuits disposed on the mechanical carrier, a fan out package disposed on the plurality of integrated circuits, a plurality of singulated substrates disposed on the fan out package, a plurality of electronic components disposed on the plurality of singulated substrates, and at least one stiffness ring disposed on the plurality of singulated substrates. A method for constructing an electronic assembly includes identifying a group of known good singulated substrates, joining the group of known good singulated substrates into a substrate panel, attaching at least one bridge to the substrate panel that electrically couples at least two of the known good singulated substrates, and mounting a plurality of electronic components onto the substrate panel, each electronic component of the plurality of electronic components corresponding to a respective known good singulated substrate.

公开(公告)号：US20240357769A1

公开(公告)日：2024-10-24

申请号：US18683408

申请日：2022-08-16

Applicant: Tesla, Inc.

Inventor： Shishuang Sun ,  Ganesh Venkataramanan ,  Yang Sun ,  Jin Zhao ,  Shaowei Deng ,  William Chang ,  Mengzhi Pang ,  Steven Butler ,  William Arthur McGee ,  Aydin Nabovati

IPC: H05K7/20

CPC classification number: H05K7/205

Abstract: The systems, methods, and devices disclosed herein relate to a multi-layer structures arranged in a vertically orientation. In some embodiments, a computing assembly can include a first cooling system, a first electronics layer, a second cooling system, and a second electronics layer. The first cooling system can be disposed on top of and can be in thermal communication with the first electronics layer. The first electronics layer array includes an array of integrated circuit dies that are in electronic communication with each other in a plane that is orthogonal to power delivery. The first electronics layer can be disposed on top of and can be in thermal communication with the second cooling system, and the second cooling system can be disposed on top of and can be in thermal communication with the second electronics layer. The second electronics layer includes an array of power delivery modules. In some embodiments, at least one layer can use system on wafer packaging.

公开(公告)号：US20240234243A1

公开(公告)日：2024-07-11

申请号：US18560325

申请日：2022-05-16

Applicant: Tesla, Inc.

Inventor： Aydin Nabovati ,  Mengzhi Pang ,  Mohamed Nasr

IPC: H01L23/373 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/3735 ,  H01L21/4882 ,  H01L23/3736 ,  H01L23/3737 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/29193 ,  H01L2224/32245 ,  H01L2224/83091 ,  H01L2924/1427 ,  H01L2924/3512

Abstract: Electronic assemblies such as system on a wafer assemblies are disclosed. The assembly can include an electronic component that has a first side, a heat removing structure that is coupled to the first side of the electronic component, and a thermal interface structure that includes a thermal interface layer and an adhesion layer. The electronic component can be a system on a wafer (SoW). The thermal interface layer is positioned between the first side of the electronic component and the heat dissipation structure. The adhesion layer is positioned between the heat removing structure and the thermal interface layer. With the thermal interface structure, the electronic component and the heat removing structure can be attached together with relatively lower pressure.

公开(公告)号：US20210005546A1

公开(公告)日：2021-01-07

申请号：US16766616

申请日：2018-11-30

Applicant: Tesla, Inc.

Inventor： Mengzhi Pang ,  Shishuang Sun ,  Ganesh Venkataramanan

IPC: H01L23/522 ,  H01L25/065 ,  H01L23/36 ,  H01L21/48 ,  H01L23/538 ,  H01L23/498

Abstract: An electronic assembly (100) includes a mechanical carrier (102), a plurality of integrated circuits (104A, 104B) disposed on the mechanical carrier, a fan out package (108) disposed on the plurality of integrated circuits, a plurality of singulated substrates (112A, 112B) disposed on the fan out package, a plurality of electronic components (114A, 114B) disposed on the plurality of singulated substrates, and at least one stiffness ring (116A, 116B, 116C) disposed on the plurality of singulated substrates. A method for constructing an electronic assembly includes identifying a group of known good singulated substrates, joining the group of known good singulated substrates into a substrate panel, attaching at least one bridge to the substrate panel that electrically couples at least two of the known good singulated substrates, and mounting a plurality of electronic components onto the substrate panel, each electronic component of the plurality of electronic components corresponding to a respective known good singulated substrate.

公开(公告)号：US12261110B2

公开(公告)日：2025-03-25

申请号：US17807475

申请日：2022-06-17

Applicant: Tesla, Inc.

Inventor： Mengzhi Pang ,  Shishuang Sun ,  Ganesh Venkataramanan

IPC: H01L23/522 ,  H01L21/48 ,  H01L23/36 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065

Abstract: An electronic assembly includes a mechanical carrier, a plurality of integrated circuits disposed on the mechanical carrier, a fan out package disposed on the plurality of integrated circuits, a plurality of singulated substrates disposed on the fan out package, a plurality of electronic components disposed on the plurality of singulated substrates, and at least one stiffness ring disposed on the plurality of singulated substrates. A method for constructing an electronic assembly includes identifying a group of known good singulated substrates, joining the group of known good singulated substrates into a substrate panel, attaching at least one bridge to the substrate panel that electrically couples at least two of the known good singulated substrates, and mounting a plurality of electronic components onto the substrate panel, each electronic component of the plurality of electronic components corresponding to a respective known good singulated substrate.

公开(公告)号：US20240145432A1

公开(公告)日：2024-05-02

申请号：US18549307

申请日：2022-03-01

Applicant: TESLA, INC.

Inventor： Mengzhi Pang ,  Yang Sun ,  Yong guo Li ,  Jianjun Li ,  Rodrigo Rodriguez Navarrete ,  Vijaykumar Krithivasan ,  Rishabh Bhandari

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/367 ,  H01L23/552 ,  H01L23/60

CPC classification number: H01L25/0652 ,  H01L23/3672 ,  H01L23/552 ,  H01L23/60 ,  H01L24/48 ,  H01L24/16 ,  H01L2224/16221 ,  H01L2224/48245

Abstract: The present disclosure relates to processing systems and more specifically to integrated circuit (IC) packages designed to reduce the effects of electrostatic discharge and/or electromagnetic interference during integrated circuit manufacture and/or use. The IC assembly may include a wafer positioned between a cooling system and thermal dissipation structure. The cooling system and thermal dissipation structure include electrically conductive material at a ground potential such that the thermal systems act as electrical ground. The wafer may be electrically connected to the cooling system and thermal dissipation structure to reduce static charge accumulation during the assembly process. The cooling system and thermal dissipation structure may further provide radio frequency (RF) shielding to reduce electromagnetic interference during use of the IC assembly.

公开(公告)号：US11901310B2

公开(公告)日：2024-02-13

申请号：US17276071

申请日：2019-09-19

Applicant: Tesla, Inc.

Inventor： Mengzhi Pang ,  Shishuang Sun ,  Ganesh Venkataramanan ,  William Arthur McGee ,  Steven Butler

IPC: H01L23/34 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L23/32 ,  H01L23/538

CPC classification number: H01L23/562 ,  H01L25/0652 ,  H01L25/18 ,  H01L23/32 ,  H01L23/5386

Abstract: An electronic assembly includes a substrate having a first surface and a second surface opposite to the first surface and a plurality of stiffening members coupled to the substrate. The substrate further includes a plurality of substrate interconnects. The electronic assembly further includes a plurality of semiconductor dies mounted on the first surface of the substrate. The plurality of semiconductor dies are electrically connected to each other via the plurality of substrate interconnects. The electronic assembly further includes a plurality of power supply modules mounted on the second surface of the substrate. Each power supply module is disposed opposite to a respective semiconductor die.

公开(公告)号：US20210351104A1

公开(公告)日：2021-11-11

申请号：US17277893

申请日：2019-09-19

Applicant: Tesla, Inc.

Inventor： Robert Yinan Cao ,  Mitchell Heschke ,  Mengzhi Pang ,  Shishuang Sun ,  Vijaykumar Krithivasan

IPC: H01L23/40 ,  H01L25/065 ,  H01L23/498 ,  H01L25/00

Abstract: Described is a multi-chip module that may include a Redistribution Layer (RDL) substrate having Integrated Circuit (IC) dies mounted to a first surface of the RDL substrate. A second plurality of IC dies may be mounted to an opposite second surface. A plurality of sockets can be mounted upon the second plurality of IC dies and a cold plate then mounted to the first plurality of IC dies. The mounting structure may include socket frames coupled to the plurality of sockets.