公开(公告)号：US20040227225A1

公开(公告)日：2004-11-18

申请号：US10873883

申请日：2004-06-22

Applicant: Tessera, Inc.

Inventor： Joseph Fjelstad ,  Konstantine Karavakis

IPC: H01L021/48 ,  H01L029/40

CPC classification number: H01L23/3114 ,  H01L23/3121 ,  H01L23/4951 ,  H01L23/498 ,  H01L23/525 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/72 ,  H01L24/82 ,  H01L24/94 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/0236 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/11334 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/16 ,  H01L2224/24011 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/274 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/85424 ,  H01L2924/00011 ,  H01L2924/01009 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/48824 ,  H01L2924/00 ,  H01L2924/01004

Abstract: A microelectronic package includes a microelectronic element having contacts accessible at a surface thereof, a layer overlying the microelectronic element, the layer having a first surface and a sloping peripheral edge extending away from the first surface of the layer, and conductive terminals overlying the microelectronic element, wherein the layer supports the conductive terminals over the microelectronic element. The package also includes conductive traces having first ends electrically connected with the contacts of the microelectronic element and second ends electrically connected with the conductive terminals, with at least one of the conductive traces having a section that is in contact with and extends along the sloping peripheral edge of the layer, and a compliant material disposed between the conductive terminals and the microelectronic element so that the conductive terminals are movable relative to the microelectronic element.

Abstract translation: 微电子封装包括具有可在其表面可访问的触点的微电子元件，覆盖微电子元件的层，该层具有远离该第一表面延伸的第一表面和倾斜周边边缘以及覆盖该微电子元件的导电端子 其中所述层支撑所述微电子元件上的导电端子。 封装还包括导电迹线，其导电迹线具有与微电子元件的触点电连接的第一端和与导电端子电连接的第二端，其中至少一个导电迹线具有与倾斜周边接触并沿着倾斜周边延伸的部分 所述层的边缘以及设置在所述导电端子和所述微电子元件之间的柔性材料，使得所述导电端子可相对于所述微电子元件移动。

公开(公告)号：US20030136968A1

公开(公告)日：2003-07-24

申请号：US10342973

申请日：2003-01-15

Applicant: Tessera, Inc.

Inventor： Joseph Fjelstad

IPC: H01L031/12 ,  H01L033/00

CPC classification number: H01L21/568 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/561 ,  H01L24/32 ,  H01L24/73 ,  H01L24/97 ,  H01L31/0203 ,  H01L2221/68377 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/48475 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/85051 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01009 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1815 ,  H01L2924/18165 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A microelectronic package including an optoelectronic element having a front face including contacts and a rear surface; flexible conductive leads having first ends connected to the contacts and second ends connected to conductive pads adjacent the optoelectronic element; and an at least partially transparent encapsulant covering the optoelectronic element, the flexible leads and the conductive pads, the conductive pads being exposed on a bottom surface of the encapsulant, the bottom surface of the encapsulant defining a bottom of the package, wherein the encapsulant at the bottom of the package extends between the conductive pads.

Abstract translation: 一种微电子封装，包括具有包括触点和后表面的正面的光电元件; 柔性导电引线具有连接到触点的第一端和连接到与光电元件相邻的导电焊盘的第二端; 以及覆盖所述光电子元件，所述柔性引线和所述导电焊盘的至少部分透明的密封剂，所述导电焊盘暴露在所述密封剂的底表面上，所述密封剂的底表面限定所述封装的底部，其中所述密封剂在 封装的底部在导电焊盘之间延伸。

公开(公告)号：US20040194294A1

公开(公告)日：2004-10-07

申请号：US10827860

申请日：2004-04-20

Applicant: Tessera, Inc.

Inventor： Joseph Fjelstad

IPC: H01C010/48

CPC classification number: H01L21/568 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/97 ,  H01L25/18 ,  H01L2221/68377 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/48472 ,  H01L2224/48475 ,  H01L2224/49171 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/85051 ,  H01L2224/85444 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2224/85 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electrical resistor is made by providing a sacrificial layer and conductive pads disposed on a first surface of the sacrificial layer. An electrically resistive material is deposited over the pads and on the first surface of the sacrificial layer to form at least one unit including the resistive material and the pads. At least part of the sacrificial layer is then removed so as to expose one or more of the pads.

公开(公告)号：US20040045159A1

公开(公告)日：2004-03-11

申请号：US10658941

申请日：2003-09-10

Applicant: Tessera, Inc.

Inventor： Thomas H. DiStefano ,  Joseph Fjelstad

IPC: C09J001/00

CPC classification number: H05K3/462 ,  H01L23/49827 ,  H01L23/5385 ,  H01L2924/0002 ,  H01R12/523 ,  H01R12/714 ,  H01R13/2414 ,  H01R43/0256 ,  H05K1/0272 ,  H05K1/036 ,  H05K1/056 ,  H05K1/116 ,  H05K3/0032 ,  H05K3/326 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0195 ,  H05K2201/0382 ,  H05K2201/0397 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2203/0554 ,  H05K2203/0582 ,  H05K2203/135 ,  H05K2203/308 ,  Y10T29/49126 ,  Y10T29/49133 ,  Y10T29/49137 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1744 ,  H01L2924/00

Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining a central hole on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts contract radially inwardly and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by friction welding, or by a conductive bonding material carried on the contacts themselves.

公开(公告)号：US20040233035A1

公开(公告)日：2004-11-25

申请号：US10881594

申请日：2004-06-30

Applicant: Tessera, Inc.

Inventor： Joseph Fjelstad

IPC: H01C007/00

CPC classification number: H01L21/568 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/97 ,  H01L25/18 ,  H01L2221/68377 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/48472 ,  H01L2224/48475 ,  H01L2224/49171 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/85051 ,  H01L2224/85444 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2224/85 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic assembly, including a microelectronic element such as a semiconductor chip and a dielectric material covering the chip and forming a body having a bottom surface. The assembly includes conductive units having portions exposed at the bottom surface, posts extending upwardly from said exposed portions and top flanges spaced above the bottom surface.

Abstract translation: 一种微电子组件，包括诸如半导体芯片的微电子元件和覆盖芯片的电介质材料，并形成具有底表面的主体。 组件包括具有暴露在底表面处的部分的导电单元，从所述露出部分向上延伸的柱和在底表面上方间隔开的顶部凸缘。

公开(公告)号：US20040169263A1

公开(公告)日：2004-09-02

申请号：US10643701

申请日：2003-08-19

Applicant: Tessera, Inc.

Inventor： Joseph Fjelstad

IPC: H01L023/02

CPC classification number: H01L24/12 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/8319 ,  H01L2224/83856 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014

Abstract: An assembly including a first microelectronic element having a first surface and a plurality of contacts exposed at the first surface; a second microelectronic element having a top surface and a plurality of contacts exposed at the top surface; and conductive elastomeric posts formed by curing a conductive elastomeric material, wherein each of the contacts of the first microelectronic element is respectively aligned with one of the contacts of the second microelectronic element, and further wherein at least some of the contacts of the first element are connected to the respectively aligned contacts of the second element by the conductive elastomeric material.

Abstract translation: 一种组件，包括具有第一表面的第一微电子元件和在第一表面处暴露的多个触点; 第二微电子元件，其具有在顶表面处暴露的顶表面和多个触点; 以及通过固化导电弹性体材料形成的导电弹性柱，其中第一微电子元件的每个触点分别与第二微电子元件的触点之一对准，并且其中第一元件的至少一些触点是 通过导电弹性体材料连接到第二元件的分别对准的触点。

公开(公告)号：US20020195685A1

公开(公告)日：2002-12-26

申请号：US10219902

申请日：2002-08-15

Applicant: Tessera, Inc.

Inventor： Joseph Fjelstad ,  Konstantine Karavakis

IPC: H01L029/06

CPC classification number: H01L23/3114 ,  H01L23/3121 ,  H01L23/4951 ,  H01L23/498 ,  H01L23/525 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/72 ,  H01L24/82 ,  H01L24/94 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/0236 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/11334 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/16 ,  H01L2224/24011 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/274 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/85424 ,  H01L2924/00011 ,  H01L2924/01009 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/48824 ,  H01L2924/00 ,  H01L2924/01004

Abstract: A microelectronic assembly includes a microelectronic element having a first surface including a central region and a peripheral region surrounding the central region, the microelectronic element including a plurality of contacts disposed in the central region. The microelectronic assembly also includes a compliant layer overlying the peripheral region of the first surface, the compliant layer having a bottom surface facing toward the first surface of the microelectronic element, a top surface facing upwardly away from the first surface of the microelectronic element and one or more edge surfaces extending between the top and bottom surfaces of the compliant layer. A plurality of flexible bond ribbons are disposed over the compliant layer so that the bond ribbons extend over the top surface and one or more of the edge surfaces and the bond ribbons electrically connect the contacts to conductive terminals overlying the top surface of the compliant layer.

Abstract translation: 微电子组件包括具有包括中心区域和围绕中心区域的周边区域的第一表面的微电子元件，微电子元件包括设置在中心区域中的多个触点。 微电子组件还包括覆盖第一表面的周边区域的顺应性层，柔顺层具有面向微电子元件的第一表面的底表面，面向上远离微电子元件的第一表面的顶表面和一个 或更多的边缘表面在顺应层的顶表面和底表面之间延伸。 多个柔性接合带设置在柔性层上方，使得接合带在顶表面上延伸，并且一个或多个边缘表面和接合带将触头电连接到覆盖顺应层的顶表面的导电端子。

公开(公告)号：US20020179325A1

公开(公告)日：2002-12-05

申请号：US10200941

申请日：2002-07-23

Applicant: Tessera, Inc.

Inventor： Thomas H. DiStefano ,  Joseph Fjelstad

IPC: H05K001/03 ,  H01R012/04

CPC classification number: H05K3/462 ,  H01L23/49827 ,  H01L23/5385 ,  H01L2924/0002 ,  H01R12/523 ,  H01R12/714 ,  H01R13/2414 ,  H01R43/0256 ,  H05K1/0272 ,  H05K1/036 ,  H05K1/056 ,  H05K1/116 ,  H05K3/0032 ,  H05K3/326 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0195 ,  H05K2201/0382 ,  H05K2201/0397 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2203/0554 ,  H05K2203/0582 ,  H05K2203/135 ,  H05K2203/308 ,  Y10T29/49126 ,  Y10T29/49133 ,  Y10T29/49137 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1744 ,  H01L2924/00

Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining a central hole on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts contract radially inwardly and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by friction welding, or by a conductive bonding material carried on the contacts themselves.

Abstract translation: 用于微电子电路板之间的互连的插入件在其表面具有接触。 每个接触件从中心导体延伸，并且具有适于从中心导体径向向内收缩的外围部分，以响应由在所接合的电路板上限定中心孔的接触垫施加的力。 因此，当电路板被内插件压缩时，触头径向向内收缩并且擦拭穿过焊盘。 擦拭动作有助于通过摩擦焊接将接触件接合到焊盘，或者通过接触件本身承载的导电接合材料。

公开(公告)号：US20030027373A1

公开(公告)日：2003-02-06

申请号：US10229593

申请日：2002-08-28

Applicant: Tessera, Inc.

Inventor： Thomas H. DiStefano ,  Joseph Fjelstad

IPC: H01L021/48

CPC classification number: H01L21/568 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49572 ,  H01L24/32 ,  H01L24/80 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/08225 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/80203 ,  H01L2224/80207 ,  H01L2224/81192 ,  H01L2224/81904 ,  H01L2224/83209 ,  H01L2224/9212 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/80001 ,  H01L2224/81

Abstract: A method of treating an interposer layer includes disposing an interposer layer between a semiconductor wafer and a substrate so that voids within the interposer layer are sealed and applying pressure to substantially eliminate the voids. A method of creating a substantially void-free interposer layer includes injecting the interposer layer between a wafer and a substrate and applying pressure to substantially remove the voids.

Abstract translation: 处理插入层的方法包括在半导体晶片和基板之间设置插入层，使得内插层内的空隙被密封并施加压力以基本上消除空隙。 创建基本上无空隙的中介层的方法包括将晶片和衬底之间的插入层注入并施加压力以基本上去除空隙。