公开(公告)号：US10686079B1

公开(公告)日：2020-06-16

申请号：US16243014

申请日：2019-01-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chih-Yi Wang ,  Cheng-Pu Chiu ,  Huang-Ren Wei ,  Tien-Shan Hsu ,  Chi-Sheng Tseng ,  Yao-Jhan Wang

IPC: H01L29/76 ,  H01L29/78 ,  H01L29/423 ,  H01L29/66 ,  H01L29/49 ,  H01L29/417 ,  H01L21/3213 ,  H01L21/8234

Abstract: A fin field effect transistor structure with particular gate appearance is provided in this disclosure, featuring a fin on a substrate and a gate on the substrate and traversing over the fin, wherein the fin is divided into an upper portion on a top surface of the fin and a lower portion on two sides of the fin, and the lower portion of the gate has protrusions laterally protruding in said first direction at positions abutting to the fin.

公开(公告)号：US09721804B1

公开(公告)日：2017-08-01

申请号：US15043627

申请日：2016-02-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Huang-Ren Wei ,  Hsuan-Sheng Lin

IPC: H01L29/06 ,  H01L21/308 ,  H01L21/306

CPC classification number: H01L21/3081 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3085 ,  H01L21/823431 ,  H01L21/823481 ,  H01L29/0657 ,  H01L29/66795

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a fin-shaped structure on the substrate; performing a first etching process to remove part of the fin-shaped structure for forming a trench; and performing a second etching process to extend the depth of the trench and divide the fin-shaped structure into a first portion and a second portion.

公开(公告)号：US11515213B2

公开(公告)日：2022-11-29

申请号：US17143179

申请日：2021-01-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chih-Chung Chen ,  Po-Chang Lin ,  Huang-Ren Wei ,  Wei-Lun Chou

IPC: H01L21/8234 ,  H01L21/266 ,  H01L21/02 ,  H01L21/311

Abstract: A method for forming a semiconductor device. A substrate having a first region and a second region surrounding the first region is provided. The first region includes a first active area and a first gate. A dummy pattern is disposed on the substrate within the second region around a perimeter of the first region. A resist pattern masks the second region and includes an opening that exposes the first region. An ion implantation process is performed to implant dopants through the opening into the first active area not covered by the first gate within the first region, thereby forming doped regions in the first active area. A resist stripping process is performed to remove the resist pattern by using a sulfuric acid-hydrogen peroxide mixture (SPM) solution at a temperature that is higher than or equal to 120˜190 degrees Celsius. The substrate is subjected to a cleaning process.

公开(公告)号：US10043675B2

公开(公告)日：2018-08-07

申请号：US15629760

申请日：2017-06-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Huang-Ren Wei ,  Hsuan-Sheng Lin

IPC: H01L21/302 ,  H01L21/308 ,  H01L21/306 ,  H01L29/06

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate; forming a fin-shaped structure on the substrate; performing a first etching process to remove part of the fin-shaped structure for forming a trench; and performing a second etching process to extend the depth of the trench and divide the fin-shaped structure into a first portion and a second portion.

公开(公告)号：US20240371699A1

公开(公告)日：2024-11-07

申请号：US18208896

申请日：2023-06-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ching-Ling Lin ,  Wen-An Liang ,  Chia-Fu Hsu ,  Huang-Ren Wei

IPC: H01L21/8234 ,  H01L21/768 ,  H01L23/528 ,  H01L27/088 ,  H01L29/66

Abstract: The invention provides a semiconductor structure, the semiconductor structure comprises a substrate, a dielectric layer located on the substrate, a plurality of gate structures located in the dielectric layer on the substrate, a plurality of first metal layers located on a part of the gate structures, and the first metal layers are respectively electrically connected with the corresponding gate structures, at least one second metal layer, the second metal layer is bridged over at least two of the gate structures, wherein the depth of the first metal layer is greater than that of the second metal layer.

公开(公告)号：US20220208612A1

公开(公告)日：2022-06-30

申请号：US17143179

申请日：2021-01-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chih-Chung Chen ,  Po-Chang Lin ,  Huang-Ren Wei ,  Wei-Lun Chou

IPC: H01L21/8234 ,  H01L21/266 ,  H01L21/311 ,  H01L21/02

Abstract: A method for forming a semiconductor device. A substrate having a first region and a second region surrounding the first region is provided. The first region includes a first active area and a first gate. A dummy pattern is disposed on the substrate within the second region around a perimeter of the first region. A resist pattern masks the second region and includes an opening that exposes the first region. An ion implantation process is performed to implant dopants through the opening into the first active area not covered by the first gate within the first region, thereby forming doped regions in the first active area. A resist stripping process is performed to remove the resist pattern by using a sulfuric acid-hydrogen peroxide mixture (SPM) solution at a temperature that is higher than or equal to 120˜190 degrees Celsius. The substrate is subjected to a cleaning process.

公开(公告)号：US09847423B1

公开(公告)日：2017-12-19

申请号：US15480340

申请日：2017-04-05

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Huang-Ren Wei

IPC: H01L21/00 ,  H01L29/78 ,  H01L29/66 ,  H01L29/06 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/311 ,  H01L21/02

CPC classification number: H01L29/785 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/31111 ,  H01L21/823431 ,  H01L21/823878 ,  H01L29/0649 ,  H01L29/66795

Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a shallow trench isolation (STI) around the fin-shaped structure; removing part of the fin-shaped structure and part of the STI to form a first trench and removing part of the STI adjacent to the fin-shaped structure to form a second trench; and forming a dielectric layer into the first trench and the second trench to form a first single diffusion break (SDB) and a second single diffusion break.

公开(公告)号：US20170287723A1

公开(公告)日：2017-10-05

申请号：US15629760

申请日：2017-06-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Huang-Ren Wei ,  Hsuan-Sheng Lin

IPC: H01L21/308 ,  H01L29/06 ,  H01L21/306

CPC classification number: H01L21/3081 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3085 ,  H01L21/823431 ,  H01L21/823481 ,  H01L29/0657 ,  H01L29/66795

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate; forming a fin-shaped structure on the substrate; performing a first etching process to remove part of the fin-shaped structure for forming a trench; and performing a second etching process to extend the depth of the trench and divide the fin-shaped structure into a first portion and a second portion.

公开(公告)号：US20170207096A1

公开(公告)日：2017-07-20

申请号：US15043627

申请日：2016-02-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Huang-Ren Wei ,  Hsuan-Sheng Lin

IPC: H01L21/308 ,  H01L21/306 ,  H01L29/06

CPC classification number: H01L21/3081 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3085 ,  H01L21/823431 ,  H01L21/823481 ,  H01L29/0657 ,  H01L29/66795

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a fin-shaped structure on the substrate; performing a first etching process to remove part of the fin-shaped structure for forming a trench; and performing a second etching process to extend the depth of the trench and divide the fin-shaped structure into a first portion and a second portion.