公开(公告)号：US20240385871A1

公开(公告)日：2024-11-21

申请号：US18745941

申请日：2024-06-17

Applicant: VMware LLC

Inventor： Jayneel Gandhi ,  Sujay Yadalam Sudarshan

IPC: G06F9/46 ,  G06F9/4401 ,  G06F9/445 ,  G06F9/455 ,  G06F9/54

Abstract: Systems and methods are described for communications across privilege domains within a central processing unit (“CPU”) core. The CPU core can store a kernel context associated with an operating system within the CPU. An application can request access to the CPU, and the CPU can load a user context associated with the application into the CPU. The CPU can execute instructions from the application while both the kernel context and the user context persist in the CPU. Because both contexts are stored on the CPU, the CPU can switch contexts without loading or unloading context data from memory.

公开(公告)号：US11947458B2

公开(公告)日：2024-04-02

申请号：US16048180

申请日：2018-07-27

Applicant: VMware LLC

Inventor： Irina Calciu ,  Jayneel Gandhi ,  Aasheesh Kolli ,  Pratap Subrahmanyam

IPC: G06F12/0817

CPC classification number: G06F12/0828 ,  G06F2212/152

Abstract: A device is connected via a coherence interconnect to a CPU with a cache. The device monitors cache coherence events via the coherence interconnect, where the cache coherence events relate to the cache of the CPU. The device also includes a buffer that can contain representations, such as addresses, of cache lines. If a coherence event occurs on the coherence interconnect indicating that a cache line in the CPU's cache is dirty, then the device is configured to add an entry to the buffer to record the dirty cache line.

公开(公告)号：US12014203B2

公开(公告)日：2024-06-18

申请号：US17533625

申请日：2021-11-23

Applicant: VMware LLC

Inventor： Jayneel Gandhi ,  Sujay Yadalam Sudarshan

IPC: G06F9/46 ,  G06F9/4401 ,  G06F9/445 ,  G06F9/455 ,  G06F9/54

CPC classification number: G06F9/461 ,  G06F9/4403 ,  G06F9/44505 ,  G06F9/45558 ,  G06F9/545

Abstract: Systems and methods are described for communications across privilege domains within a central processing unit (“CPU”) core. The CPU core can store a kernel context associated with an operating system within the CPU. An application can request access to the CPU, and the CPU can load a user context associated with the application into the CPU. The CPU can execute instructions from the application while both the kernel context and the user context persist in the CPU. Because both contexts are stored on the CPU, the CPU can switch contexts without loading or unloading context data from memory.