公开(公告)号：US20150056761A1

公开(公告)日：2015-02-26

申请号：US14467509

申请日：2014-08-25

Applicant: Ye Xin Technology Consulting Co., Ltd.

Inventor： I-WEI WU ,  I-MIN LU ,  WEI-CHIH CHANG ,  HUI-CHU LIN ,  YI-CHUN KAO ,  KUO-LUNG FANG

IPC: H01L27/12 ,  H01L21/308 ,  H01L21/3065 ,  H01L29/66

CPC classification number: H01L27/1288 ,  H01L21/31058 ,  H01L21/31144 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

Abstract: A manufacturing method of a thin film transistor includes hard-baking and etching processes for a stop layer. Two through holes are exposed and developed in a photoresistor layer, in which a distance between the two through holes is substantially equal to the channel length of the thin film transistor. Further, the etching stop layer is dry-etched to obtain the thin film transistor having an expected channel length.

Abstract translation: 薄膜晶体管的制造方法包括用于停止层的硬烘烤和蚀刻工艺。 两个通孔在光敏电阻层中曝光和显影，其中两个通孔之间的距离基本上等于薄膜晶体管的沟道长度。 此外，蚀刻停止层被干蚀刻以获得具有预期通道长度的薄膜晶体管。

公开(公告)号：US20150053974A1

公开(公告)日：2015-02-26

申请号：US14467444

申请日：2014-08-25

Applicant: Ye Xin Technology Consulting Co., Ltd.

Inventor： I-WEI WU ,  I-MIN LU ,  WEI-CHIH CHANG ,  HUI-CHU LIN ,  YI-CHUN KAO ,  KUO-LUNG FANG

IPC: H01L27/12 ,  H01L21/308 ,  H01L29/786

CPC classification number: H01L29/7869 ,  H01L21/31058 ,  H01L21/31144 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78606

Abstract: A thin film transistor includes a gate electrode, a gate insulating layer, a channel layer, an etching stop layer, two contact holes, a source, and a drain. The gate insulating layer covers the gate electrode. The channel layer is arranged on the gate insulating layer corresponding to the gate electrode. The etching stop layer covers the channel layer and includes an organic stop layer and a hard mask layer, the hard mask layer is located on a surface of the organic stop layer opposite to the channel layer to enhance a hardness of the organic stop layer. The two contact holes pass through the etching stop layer. The source connects to the channel via one contact hole, and the drain connects to the channel via the other contact hole.

Abstract translation: 薄膜晶体管包括栅电极，栅极绝缘层，沟道层，蚀刻停止层，两个接触孔，源极和漏极。 栅极绝缘层覆盖栅电极。 沟道层布置在对应于栅电极的栅极绝缘层上。 蚀刻停止层覆盖沟道层并且包括有机阻挡层和硬掩模层，硬掩模层位于与沟道层相对的有机阻挡层的表面上，以提高有机阻挡层的硬度。 两个接触孔穿过蚀刻停止层。 源极通过一个接触孔连接到通道，漏极通过另一个接触孔连接到通道。