Invention Grant
- Patent Title: Bandwidth matched scheduler
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Application No.: US15951844Application Date: 2018-04-12
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Publication No.: US10601723B2Publication Date: 2020-03-24
- Inventor: Alan Dodson Smith , Vydhyanathan Kalyanasundharam , Bryan P. Broussard , Greggory D. Donley , Chintan S. Patel
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Kowert Hood Munyon Rankin and Goetzel PC
- Agent Rory D. Rankin
- Main IPC: H04L12/873
- IPC: H04L12/873 ; H04L12/841 ; H04L12/877 ; H04L12/875 ; H04L12/54 ; H04L12/70

Abstract:
A computing system uses a memory for storing data, one or more clients for generating network traffic and a communication fabric with network switches. The network switches include centralized storage structures, rather than separate input and output storage structures. The network switches store particular metadata corresponding to received packets in a single, centralized collapsing queue where the age of the packets corresponds to a queue entry position. The payload data of the packets are stored in a separate memory, so the relatively large amount of data is not shifted during the lifetime of the packet in the network switch. The network switches select sparse queue entries in the collapsible queue, deallocate the selected queue entries, and shift remaining allocated queue entries toward a first end of the queue with a delay proportional to the radix of the network switches.
Public/Granted literature
- US20190319891A1 BANDWIDTH MATCHED SCHEDULER Public/Granted day:2019-10-17
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