Invention Grant
- Patent Title: System and methods for hardware-software cooperative pipeline error detection
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Application No.: US16811499Application Date: 2020-03-06
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Publication No.: US11409597B2Publication Date: 2022-08-09
- Inventor: Michael Sullivan , Siva Hari , Brian Zimmer , Timothy Tsai , Stephen W. Keckler
- Applicant: NVIDIA Corp.
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corp.
- Current Assignee: NVIDIA Corp.
- Current Assignee Address: US CA Santa Clara
- Agency: Rowan TELS LLC
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G06F9/30 ; G06F11/07

Abstract:
An error reporting system utilizes a parity checker to receive data results from execution of an original instruction and a parity bit for the data. A decoder receives an error correcting code (ECC) for data resulting from execution of a shadow instruction of the original instruction, and data error correction is initiated on the original instruction result on condition of a mismatch between the parity bit and the original instruction result, and the decoder asserting a correctable error in the original instruction result.
Public/Granted literature
- US20200210276A1 SYSTEM AND METHODS FOR HARDWARE-SOFTWARE COOPERATIVE PIPELINE ERROR DETECTION Public/Granted day:2020-07-02
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