Abstract:
A flat-panel display contains a pair of plate structures (20, 22) separated by a spacer (24) having a rough face (54, 56). When electrons strike the spacer, the roughness in the spacer's face causes the number of secondary electrons that escape the spacer to be reduced, thereby alleviating positive charge buildup on the spacer. As a result, the image produced by the display is improved. The spacer facial roughness can be achieved in various ways such as depressions and/or protuberances. Various techniques are presented for manufacturing the display, including the rough-faced spacer.
Abstract:
The intensity at which electrons emitted by a first plate structure (10) in a slat-panel display strike a second plate structure (12) for causing it to emit light is controlled so as to reduce image degradation that could otherwise arise from undesired electron-trajectory changes caused by effects such as the presence of a spacer system (14) between the plate structures. An electron-emissive region (20) in the first plate structure typically contains multiple laterally separated electron-emissive portions (201 and 202) for selectively emitting electrons. An electron-focusing system in the first plate structure has corresponding focus openings (40p1 and 40p2) through which electrons emitted by the electron-emissive portions respectively pass. Upon being struck by the so-emitted electrons, a light-emissive region (22) in the second plate structure emits light to produce at least part of a dot of the display's image.
Abstract:
A flat panel display apparatus comprising: a faceplate, a backplate disposed opposing said faceplate, said faceplate and said backplate adapted to be connected in a sealed environment such that a low pressure region exists between said faceplate and said backplate; a spacer assembly (900) disposed within said sealed environment, said spacer assembly supporting said faceplate and said backplate against forces acting in a direction towards said sealed environment, said spacer assembly tailored to provide a secondary electron emission coefficient of approximately 1 for said spacer assembly when said spacer assembly is subjected to flat panel display operating voltages, said spacer assembly further including a spacer structure (902); and a coating material (904) applied to at least a portion of said spacer structure, wherein said coating material is comprised of a layered material that is oriented with its basal plane parallel to a face of said spacer structure (902).
Abstract:
The intensity at which electrons emitted by a first plate structure (10) in a flat-panel display strike a second plate structure (12) for causing it to emit light is controlled so as to reduce image degradation that could otherwise arise from undesired electron-trajectory changes caused by effects such as the presence of a spacer system (14) between the plate structures. An electron-emissive region (20) in the first plate structure typically contains multiple laterally separated electron-emissive portions (201 and 202) for selectively emitting electrons. An electron-focusing system in the first plate structure has corresponding focus openings (40P1 and 40P2) through which electrons emitted by the electron-emissive portions respectively pass. Upon being struck by the so-emitted electrons, a light-emissive region (22) in the second plate structure emits light to produce at least part of a dot of the display's image.
Abstract:
A voltage ratio regulator circuit (300) for a spacer electrode (140) of a flat panel display screen. Within one implementation of a field emission display (FED) device (100), thin spacer walls (130) are inserted between a high voltage (Vh) faceplate (120) and a backplate (164) to secure these structures are a vacuum is formed between. The faceplate (120) warms relative to the backplate (164) as a result of energy released by a phosphor layer, thereby generating a temperature gradient along the spacer walls (130). The top portion of each spacer wall (130) becomes more conductive with increased temperature and acts to attract electrons that are emitted toward the faceplate (120). To counter this attraction, a spacer electrode (140) is placed along each spacer wall (130) at a height, d, above the backplate (164) and maintained at a voltage, Ve. The spacer electrode (140) at Ve and the high voltage supply (250) at Vh are both coupled to a voltage ratio regulator circuit (300) which maintains the ratio (Ve/Vh) using voltage dividers (R1, R2, R10 and R11, R3), an operational amplifier (310) and other circuitry. The voltage ratio regulator (300) compensates for variations in voltage supply performance. The time constants (R1, C1 and R3, C3) of the voltage ratio regulator circuit (300) is tuned to be near or slightly faster than the time constant of the inherent resistance (RW1, RW2) and capacitance (CW1, CW2) of the spacer wall (130). The invention improves the electron path accuracy for pixels located near spacer walls.