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    METHODS AND SYSTEMS FOR MEASURING DISPLAY ATTRIBUTES OF A FED
    1.
    发明申请
    METHODS AND SYSTEMS FOR MEASURING DISPLAY ATTRIBUTES OF A FED 审中-公开
    用于测量FED的显示属性的方法和系统

    公开(公告)号：WO03002957A3

    公开(公告)日：2003-05-01

    申请号：PCT/US0220243

    申请日：2002-06-24

    Applicant: CANDESCENT TECH CORP

    Inventor： CUMMINGS WILLIAM ,  DUNPHY JAMES C ,  HANSEN RONALD L ,  LIU JUN ,  CRESSI LEE ,  STANNERS COLIN ,  SPINDT CHRISTOPHER J

    IPC: G01R31/24 ,  G09G3/20 ,  G09G3/22 ,  G09G3/10

    CPC classification number: G09G3/22 ,  G09G2320/0233 ,  G09G2320/0285

    Abstract: Method for compensating for brightness variations in a field emission device (100a). In one embodiment, a method and system are described for measuring the relative brightness of rows of a field emission display (FED) device (100a), storing information representing the measured brightness into a correction table and using the correction table to provide uniform row brightness in the display by adjusting row voltages and/or row on-time periods. A special measurement process is described for providing accurate current measurements on the rows. This embodiment compensates for brightness variations of the rows, e.g., for rows near the spacer walls (30). In another embodiment, a periodic signal, e.g., a high frequency noise signal (340), is added to the row on-time pulse in order to camouflage brightness variations in the rows near the spacer walls (30). In another embodiment, the area under the row on-time pulse is adjusted to provide row-by-row brightness compensation based on correction values stored in a memory resident correction table (60). In another embodiment, the brightness of each row is measured and compiled into a data profile for the FED. The data profile is used to control cathode burn-in processes so that brightness variations are corrected by physically altering the characteristics of the emitters of the rows.

    Abstract translation: 用于补偿场发射器件（100a）中的亮度变化的方法。 在一个实施例中，描述了用于测量场致发射显示器（FED）设备（100a）的行的相对亮度的方法和系统，将表示测量的亮度的信息存储到校正表中并且使用校正表来提供均匀的行亮度 在显示器中通过调节行电压和/或行导通时间周期。 描述了一种特殊的测量过程，用于在行上提供精确的电流测量。 该实施例补偿了行的亮度变化，例如对于间隔壁（30）附近的行。 在另一个实施例中，将周期性信号（例如高频噪声信号（340））加到行导通时间脉冲上以便伪装间隔壁（30）附近的行中的亮度变化。 在另一个实施例中，基于存储在存储器驻留校正表（60）中的校正值来调整行导通时间脉冲下的面积以提供逐行亮度补偿。 在另一个实施例中，每行的亮度被测量并被编译成用于FED的数据简档。 数据配置文件用于控制阴极老化过程，以便通过物理改变行发射器的特性来校正亮度变化。

    PROCEDURES AND APPARATUS FOR TURNING-ON AND TURNING-OFF ELEMENTS WITHIN A FED DEVICE
    2.
    发明申请
    PROCEDURES AND APPARATUS FOR TURNING-ON AND TURNING-OFF ELEMENTS WITHIN A FED DEVICE 审中-公开
    用于在FED设备内打开和关闭元件的程序和设备

    公开(公告)号：WO02073582A3

    公开(公告)日：2002-11-14

    申请号：PCT/US0206067

    申请日：2002-02-26

    Applicant: CANDESCENT TECH CORP

    Inventor： DUNPHY JAMES C ,  HANSEN RONALD L ,  LINDBERG BRIAN E ,  TRUPPA JEROME M ,  ELLOWAY DONALD J ,  AMANIAMPONG DUKE K

    IPC: H01J29/04 ,  G09G3/20 ,  G09G3/22 ,  H01J9/44 ,  H01J29/28 ,  H01J29/62 ,  H01J29/94 ,  H01J29/96 ,  H01J31/12 ,  G09G3/10

    CPC classification number: H01J9/44 ,  G09G3/22 ,  G09G2310/066 ,  H01J2209/0223

    Abstract: A circuit and method for turning-on and turning-off elements of an field emission display device to protect against emitter electrode(60) and gate electrode(50) degradation. The circuit(910) includes control logic(916) having a sequencer which in one embodiment can be realized using a state machine. Upon power-on, the control logic sends an enable signal to a high voltage power supply (912) that supplies voltage to the anode electrode (914). At this time a low voltage power supply (918) and driving circuitry (920)are disabled. Upon receiving a confirmation signal from the high voltage power supply, the control logic enables the low voltage power supply which supplies voltage to the driving circuitry (920). Upon receiving a confirmation signal from the low voltage power supply (918), or optionally after expiration of a predetermined time period, the control logic (916) then enables the driving circuitry (920) which drives the gate electrodes (50) and the emitter electrodes (60) which make up the rows and columns of the FED device. Upon power down, the control logic (916) first disables the low voltage power supply (918), then the high voltage power supply (912).

    Abstract translation: 一种用于导通和关断场致发射显示设备的元件的电路和方法，以防止发射电极（60）和栅电极（50）退化。 电路（910）包括具有定序器的控制逻辑（916），定序器在一个实施例中可以使用状态机来实现。 在通电时，控制逻辑将启动信号发送到将电压供应到阳极电极（914）的高压电源（912）。 此时，低压电源（918）和驱动电路（920）被禁用。 在从高压电源接收到确认信号时，控制逻辑启用向驱动电路（920）供应电压的低压电源。 一旦从低电压电源（918）接收到确认信号，或者可选地在预定时间段期满后，控制逻辑（916）然后启用驱动电路（920），其驱动栅电极（50）和发射器 构成FED装置的行和列的电极（60）。 在断电时，控制逻辑（916）首先禁用低电压电源（918），然后禁用高电压电源（912）。

    FLAT-PANEL DISPLAY WITH INTENSITY CONTROL TO REDUCE LIGHT-CENTROID SHIFTING
    3.
    发明申请
    FLAT-PANEL DISPLAY WITH INTENSITY CONTROL TO REDUCE LIGHT-CENTROID SHIFTING 审中-公开
    带强度控制的平板显示器可减少光线偏移

    公开(公告)号：WO0002081A3

    公开(公告)日：2000-04-20

    申请号：PCT/US9914679

    申请日：1999-06-29

    Applicant: CANDESCENT TECH CORP

    Inventor： SCHROPP DONALD R JR ,  FIELD JOHN E ,  DUNPHY JAMES C ,  PAN LAWRENCE S ,  MORRIS DAVID L ,  BESSER RONALD S ,  SPINDT CHRISTOPHER J

    IPC: H01J29/04 ,  H01J29/02 ,  H01J29/32 ,  H01J29/48 ,  H01J29/62 ,  H01J29/87 ,  H01J31/12 ,  H01J19/38

    CPC classification number: H01J29/028 ,  H01J29/467 ,  H01J29/481 ,  H01J31/127 ,  H01J2201/025 ,  H01J2329/8625

    Abstract: The intensity at which electrons emitted by a first plate structure (10) in a slat-panel display strike a second plate structure (12) for causing it to emit light is controlled so as to reduce image degradation that could otherwise arise from undesired electron-trajectory changes caused by effects such as the presence of a spacer system (14) between the plate structures. An electron-emissive region (20) in the first plate structure typically contains multiple laterally separated electron-emissive portions (201 and 202) for selectively emitting electrons. An electron-focusing system in the first plate structure has corresponding focus openings (40p1 and 40p2) through which electrons emitted by the electron-emissive portions respectively pass. Upon being struck by the so-emitted electrons, a light-emissive region (22) in the second plate structure emits light to produce at least part of a dot of the display's image.

    Abstract translation: 通过板条显示器中的第一板结构（10）发射的电子撞击第二板结构（12）以使其发射光的强度被控制，以便减少否则可能由不希望的电子 - 由诸如在板结构之间存在间隔系统（14）的效应引起的轨迹变化。 第一板结构中的电子发射区域（20）通常包含多个横向分离的电子发射部分（201和202），用于选择性地发射电子。 第一板结构中的电子聚焦系统具有对应的聚焦开口（40p1和40p2），由电子发射部分发射的电子分别通过聚焦开口（40p1和40p2）。 在被如此发射的电子撞击时，第二板结构中的发光区域（22）发光以产生显示器图像的点的至少一部分。

    Methods and systems for measuring display attributes of a fed
    8.
    发明专利
    Methods and systems for measuring display attributes of a fed 未知

    公开(公告)号：AU2002320162A1

    公开(公告)日：2003-03-03

    申请号：AU2002320162

    申请日：2002-06-24

    Applicant: CANDESCENT TECH CORP

    Inventor： HANSEN RONALD L ,  CRESSI LEE ,  SPINDT CHRISTOPHER J ,  DUNPHY JAMES C ,  LIU JUN ,  CUMMINGS WILLIAM ,  STANNERS COLIN

    IPC: G01R31/24 ,  G09G3/20 ,  G09G3/22 ,  G09G3/10

    Abstract: In a field emission display (FED) device comprising: rows and columns of emitters; and an anode electrode, a method of measuring display attributes of said FED device comprising the steps of: a) in a scan fashion, individually driving each row and measuring the current drawn by each row, wherein a settling time is allowed after each row is driven; b) measuring a background current level during a vertical blanking interval; c) correcting current measurements taken during said step a) by said background current level to yield corrected current measurements; d) averaging multiple corrected current measurements taken over multiple display frames to produce averaged corrected current values for all rows of said FED device; and e) generating a memory resident correction table based on said averaged corrected current values.

    VOLTAGE RATIO REGULATOR SYSTEM
    9.
    发明公开
    VOLTAGE RATIO REGULATOR SYSTEM 审中-公开
    VOLTSPANNUNGSREGLERSYSTEM

    公开(公告)号：EP1092181A4

    公开(公告)日：2005-07-13

    申请号：EP99912865

    申请日：1999-03-23

    Applicant: CANDESCENT TECH CORP

    Inventor： DUNPHY JAMES C ,  SCHROPP DONALD R JR

    IPC: G09G3/20 ,  G05F1/10 ,  G09G3/22 ,  H01J29/02 ,  H01J31/12 ,  G05F1/00

    CPC classification number: G09G3/22 ,  G09G2300/043 ,  H01J29/028 ,  H01J31/127 ,  H01J2329/8625 ,  H01J2329/864 ,  H01J2329/8645

    Abstract: A voltage ratio regulator circuit (300) for a spacer electrode (140) of a flat panel display screen. Within one implementation of a field emission display (FED) device (100), thin spacer walls (130) are inserted between a high voltage (Vh) faceplate (120) and a backplate (164) to secure these structures are a vacuum is formed between. The faceplate (120) warms relative to the backplate (164) as a result of energy released by a phosphor layer, thereby generating a temperature gradient along the spacer walls (130). The top portion of each spacer wall (130) becomes more conductive with increased temperature and acts to attract electrons that are emitted toward the faceplate (120). To counter this attraction, a spacer electrode (140) is placed along each spacer wall (130) at a height, d, above the backplate (164) and maintained at a voltage, Ve. The spacer electrode (140) at Ve and the high voltage supply (250) at Vh are both coupled to a voltage ratio regulator circuit (300) which maintains the ratio (Ve/Vh) using voltage dividers (R1, R2, R10 and R11, R3), an operational amplifier (310) and other circuitry. The voltage ratio regulator (300) compensates for variations in voltage supply performance. The time constants (R1, C1 and R3, C3) of the voltage ratio regulator circuit (300) is tuned to be near or slightly faster than the time constant of the inherent resistance (RW1, RW2) and capacitance (CW1, CW2) of the spacer wall (130). The invention improves the electron path accuracy for pixels located near spacer walls.

    Abstract translation: 一种用于平板显示屏的间隔电极的电压比调节器电路。 在场致发射显示器（FED）器件的一个实施方案中，在高电压（Vh）面板和背板之间插入薄间隔壁，以在两者之间形成真空来固定这些结构。 面板上的荧光体层接收从背板（阴极）离散的电子发射区域选择性地发射的电子，从而在面板上形成图像。 作为由荧光体层释放的能量的结果，面板相对于背板加热，从而沿着间隔壁产生温度梯度。 每个间隔壁的顶部在升高的温度下变得更加导电并用于吸引向面板发射的电子。 为了抵抗这种吸引力，沿着每个间隔壁沿着背板上方的高度d放置间隔电极并保持在电压Ve。 所有间隔壁的电极连接在一起。 Ve处的间隔电极和Vh处的高电压源都耦合到电压比调节器电路，其使用分压器，运算放大器和其它电路保持比率（Ve / Vh）。 电压比调节器补偿电压供应性能的变化。 电压比常规电路的时间常数被调谐为接近或略快于间隔壁的固有电阻和电容的时间常数。 本发明还可以校正间隔壁上的电压误差的其它来源。 本发明改善了靠近隔离墙的像素的电子路径精度。

    PROCEDURES AND APPARATUS FOR TURNING-ON AND TURNING-OFF ELEMENTS WITHIN A FED DEVICE
    10.
    发明公开
    PROCEDURES AND APPARATUS FOR TURNING-ON AND TURNING-OFF ELEMENTS WITHIN A FED DEVICE 审中-公开
    程序和设备元素在美联储组分车削

    公开(公告)号：EP1364361A4

    公开(公告)日：2005-07-06

    申请号：EP02725025

    申请日：2002-02-26

    Applicant: CANDESCENT TECH CORP

    Inventor： DUNPHY JAMES C ,  HANSEN RONALD L ,  LINDBERG BRIAN E ,  TRUPPA JEROME M ,  ELLOWAY DONALD J ,  AMANIAMPONG DUKE K

    IPC: H01J29/04 ,  G09G3/20 ,  G09G3/22 ,  H01J9/44 ,  H01J29/28 ,  H01J29/62 ,  H01J29/94 ,  H01J29/96 ,  H01J31/12

    CPC classification number: H01J9/44 ,  G09G3/22 ,  G09G2310/066 ,  H01J2209/0223

    Abstract: A circuit and method for turning-on and turning-off elements of an field emission display device to protect against emitter electrode(60) and gate electrode(50) degradation. The circuit(910) includes control logic(916) having a sequencer which in one embodiment can be realized using a state machine. Upon power-on, the control logic sends an enable signal to a high voltage power supply (912) that supplies voltage to the anode electrode (914). At this time a low voltage power supply (918) and driving circuitry (920)are disabled. Upon receiving a confirmation signal from the high voltage power supply, the control logic enables the low voltage power supply which supplies voltage to the driving circuitry (920). Upon receiving a confirmation signal from the low voltage power supply (918), or optionally after expiration of a predetermined time period, the control logic (916) then enables the driving circuitry (920) which drives the gate electrodes (50) and the emitter electrodes (60) which make up the rows and columns of the FED device. Upon power down, the control logic (916) first disables the low voltage power supply (918), then the high voltage power supply (912).

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