公开(公告)号：JP2000228442A

公开(公告)日：2000-08-15

申请号：JP2000025509

申请日：2000-02-02

Applicant: IBM ,  SIEMENS AG

Inventor： HO HERBERT ,  SRINIVASAN RADHIKA ,  HAMMERL ERWIN ,  AGAHI FARID ,  BRONNER GARY ,  FLIETNER BERTRAND

IPC: H01L21/76 ,  H01L21/762

Abstract: PROBLEM TO BE SOLVED: To reduce parasitic leak of a shallow trench isolation via. SOLUTION: A distance between a silicon nitride liner 43 and an active silicon sidewall is increased by depositing an insulation oxide layer 20 prior to depositing of the silicon nitride liner 43. Preferably, the insulation oxide layer 20 comprises tetraethyl orthosilicate. The method includes formation of one or a plurality of shallow trench isolations inside a semiconductor wafer through etching, sticking of an insulation oxide layer 20 inside a trench, formation of thermal oxide 25 inside a trench and sticking of the silicon nitride liner 43 inside a trench. The thermal oxide 25 can be formed before or after the insulation oxide layer 20 is deposited.

公开(公告)号：AT518240T

公开(公告)日：2011-08-15

申请号：AT00101726

申请日：2000-01-27

Applicant: IBM ,  INFINEON TECHNOLOGIES AG

Inventor： HO HERBERT ,  SRINIVASAN RADHIKA ,  HAMMERL ERWIN ,  AGAHI FARID ,  BRONNER GARY ,  FLIETNER BERTRAND

IPC: H01L21/76 ,  H01L21/762

Abstract: A reduction in parasitic leakages of shallow trench isolation vias is disclosed wherein the distance between the silicon nitride liner and the active silicon sidewalls is increased by depositing an insulating oxide layer prior to deposition of the silicon nitride liner. Preferably, the insulating oxide layer comprises tetraethylorthosilicate. The method comprises of etching one or more shallow trench isolations into a semiconductor wafer; depositing an insulating oxide layer into the trench; growing a thermal oxide in the trench; and depositing a silicon nitride liner in the trench. The thermal oxide may be grown prior to or after deposition of the insulating oxide layer.

公开(公告)号：CZ20011964A3

公开(公告)日：2001-11-14

申请号：CZ20011964

申请日：1999-11-26

Applicant: IBM

Inventor： AGAHI FARID ,  HSU LOUIS ,  MANDELMAN JACK

IPC: H01L21/8242 ,  H01L27/108

Abstract: A memory device formed in a substrate having a trench with side walls formed in the substrate. The device includes a bit line conductor and a word line conductor. A signal storage node has a first electrode, a second electrode formed within the trench, and a node dielectric formed between the first and second electrodes. A signal transfer device has: (i) an annular signal transfer region with an outer surface adjacent the side walls of the trench, an inner surface, a first end, and a second end; (ii) a first diffusion region coupling the first end of the signal transfer region to the. second electrode of the signal storage node; (iii) a second diffusion region coupling the second end of the signal transfer region to the bit line conductor; (iv) a gate insulator coating the inner surface of the signal transfer region; and (v) a gate conductor coating the gate insulator and coupled to the word line. A conductive connecting member couples the signal transfer region to a reference voltage to reduce floating body effects.

公开(公告)号：PL348501A1

公开(公告)日：2002-05-20

申请号：PL34850199

申请日：1999-11-26

Applicant: IBM

Inventor： AGAHI FARID ,  HSU LOUIS ,  MANDELMAN JACK

IPC: H01L21/8242 ,  H01L27/108

Abstract: A memory device formed in a substrate having a trench with side walls formed in the substrate. The device includes a bit line conductor and a word line conductor. A signal storage node has a first electrode, a second electrode formed within the trench, and a node dielectric formed between the first and second electrodes. A signal transfer device has: (i) an annular signal transfer region with an outer surface adjacent the side walls of the trench, an inner surface, a first end, and a second end; (ii) a first diffusion region coupling the first end of the signal transfer region to the. second electrode of the signal storage node; (iii) a second diffusion region coupling the second end of the signal transfer region to the bit line conductor; (iv) a gate insulator coating the inner surface of the signal transfer region; and (v) a gate conductor coating the gate insulator and coupled to the word line. A conductive connecting member couples the signal transfer region to a reference voltage to reduce floating body effects.

公开(公告)号：CZ295847B6

公开(公告)日：2005-11-16

申请号：CZ20011964

申请日：1999-11-26

Applicant: IBM

Inventor： AGAHI FARID ,  HSU LOUIS ,  MANDELMAN JACK

IPC: H01L21/8242 ,  H01L27/108

Abstract: In the present invention, there is disclosed a memory device (200) in a substrate having a trench with side walls in the substrate, said memory device (200) including bit line conductors (246) and word line conductors (230). Signal storage node has a first electrode (202), a second electrode (204) formed within the trench (252; DT), and a node dielectric (206) formed between the electrodes (202, 204). The signal transfer device has: an annular signal transfer region (222) with outer surface adjacent side walls (212) of the trench (252; DT), an inner surface, a first and a second end; a first diffusion region (218) coupling the first end of the signal transfer region (222) to the second electrode (204) of the signal storage node; a second diffusion region (220) coupling the second end of signal transfer region (222) to the bit line conductor (246); a gate insulator (224) coating the inner surface of signal transfer region (222); and a gate conductor (226) coating the gate insulator (224) and coupled to the word line conductor (230). A conductive connecting member (236) couples the signal transfer region (222) to a reference voltage.

公开(公告)号：DE69627086D1

公开(公告)日：2003-05-08

申请号：DE69627086

申请日：1996-08-19

Applicant: IBM

Inventor： AGAHI FARID ,  PEZESHKI BARDIA ,  KASH JEFFREY ALAN ,  WELSER JEFFREY JOHN

IPC: G02B6/00 ,  G02B6/12 ,  G02F1/313 ,  H01L31/0232 ,  H01L31/10 ,  G02B6/293

Abstract: This invention describes how commercial silicon-on-insulator material can be used to fabricate both wavelength filters and wavelength-selective photodetectors. The silicon-on-insulator substrates (100) have a buried silicon dioxide layer (102) and a thin top silicon layer (104) and are manufactured for high speed electronics applications. However, in this invention, the thin silicon layer (104) is used as the core of a waveguide and the buried silicon dioxide (102) as a lower cladding region. Another cladding layer (106) and a low index waveguide (108) is fabricated on the commercial substrate to form an asymmetric waveguide coupler structure. The added low index waveguide (108) and the original thin silicon layer (104) form the two waveguides of the coupler. Since the two waveguide materials have very different indices of refraction, they are only phase-matched at one wavelength (111). Thus for a given thickness of materials, only one wavelength (111) couples between the two waveguides (104, 108). By adding an absorptive layer in the silicon waveguide and electrical contacts, wavelength sensitive photodetection is obtained. The buried insulator layer (102) is the key to device operation, providing a very low index buried cladding region.

公开(公告)号：DE69627086T2

公开(公告)日：2004-02-26

申请号：DE69627086

申请日：1996-08-19

Applicant: IBM

Inventor： AGAHI FARID ,  PEZESHKI BARDIA ,  KASH JEFFREY ALAN ,  WELSER JEFFREY JOHN

IPC: G02B6/00 ,  G02B6/12 ,  G02F1/313 ,  H01L31/0232 ,  H01L31/10 ,  G02B6/293

Abstract: This invention describes how commercial silicon-on-insulator material can be used to fabricate both wavelength filters and wavelength-selective photodetectors. The silicon-on-insulator substrates (100) have a buried silicon dioxide layer (102) and a thin top silicon layer (104) and are manufactured for high speed electronics applications. However, in this invention, the thin silicon layer (104) is used as the core of a waveguide and the buried silicon dioxide (102) as a lower cladding region. Another cladding layer (106) and a low index waveguide (108) is fabricated on the commercial substrate to form an asymmetric waveguide coupler structure. The added low index waveguide (108) and the original thin silicon layer (104) form the two waveguides of the coupler. Since the two waveguide materials have very different indices of refraction, they are only phase-matched at one wavelength (111). Thus for a given thickness of materials, only one wavelength (111) couples between the two waveguides (104, 108). By adding an absorptive layer in the silicon waveguide and electrical contacts, wavelength sensitive photodetection is obtained. The buried insulator layer (102) is the key to device operation, providing a very low index buried cladding region.

公开(公告)号：HU0104475A2

公开(公告)日：2002-03-28

申请号：HU0104475

申请日：1999-11-26

Applicant: IBM

Inventor： AGAHI FARID ,  HSU LOUIS ,  MANDELMAN JACK

IPC: H01L21/8242 ,  H01L27/108 ,  H01L21/824

Abstract: A memory device formed in a substrate having a trench with side walls formed in the substrate. The device includes a bit line conductor and a word line conductor. A signal storage node has a first electrode, a second electrode formed within the trench, and a node dielectric formed between the first and second electrodes. A signal transfer device has: (i) an annular signal transfer region with an outer surface adjacent the side walls of the trench, an inner surface, a first end, and a second end; (ii) a first diffusion region coupling the first end of the signal transfer region to the. second electrode of the signal storage node; (iii) a second diffusion region coupling the second end of the signal transfer region to the bit line conductor; (iv) a gate insulator coating the inner surface of the signal transfer region; and (v) a gate conductor coating the gate insulator and coupled to the word line. A conductive connecting member couples the signal transfer region to a reference voltage to reduce floating body effects.