公开(公告)号：EP1212675A4

公开(公告)日：2007-06-20

申请号：EP00913722

申请日：2000-03-02

Applicant: IBM

Inventor： ARMSTRONG WILLIAM JOSEPH ,  NAYAR NARESH

IPC: G06F9/00 ,  G06F9/46 ,  G06F9/50 ,  G06F9/54 ,  G06F9/40 ,  G06F13/00 ,  G06F15/16 ,  G06F15/167

CPC classification number: G06F9/542 ,  G06F9/50

Abstract: An apparatus, program product and method utilize an event-driven communications interface to support communications between multiple logical partitions (40, 42, and 44) in a logically-partitioned computer. The event-driven communications interface is at least partially disposed within a partition manager (46) that is accessible to each of the logical partitions (40, 42, and 44). Events are typically passed between logical partitions (40, 42, and 44) in the form of messages that are passed first from a source logical partition that initiates the event, through the partition manager (46), and then to a target logical partition to which the event is directed, while maintaining the independent address spaces associated with the logical partitions (40, 42, and 44).

公开(公告)号：WO03019360A2

公开(公告)日：2003-03-06

申请号：PCT/EP0208233

申请日：2002-07-24

Applicant: IBM ,  IBM DEUTSCHLAND

Inventor： ARMSTRONG WILLIAM JOSEPH ,  FRANCOIS CHRIS ,  NAYAR NARESH

IPC: G06F9/46 ,  G06F9/00 ,  G06F9/44 ,  G06F9/48 ,  G06F9/50 ,  G06F15/00

CPC classification number: G06F9/4843 ,  G06F9/4881 ,  G06F9/5077

Abstract: An apparatus, program product and method for coordinating the distribution of CPUs as among logically-partitioned virtual processors. A virtual processor may yield a CPU to precipitate an occurrence upon which its own execution may be predicated. As such, program code may dispatch the surrendered CPU to a designated virtual processor.

Abstract translation: 一种用于在逻辑分区的虚拟处理器之间协调CPU分配的装置，程序产品和方法。 虚拟处理器可能会产生一个CPU来产生一个预测其自身执行的事件。 这样，程序代码可以将交出的CPU分派给指定的虚拟处理器。

公开(公告)号：WO2006117394A2

公开(公告)日：2006-11-09

申请号：PCT/EP2006062046

申请日：2006-05-04

Applicant: IBM ,  IBM UK ,  ARMSTRONG WILLIAM JOSEPH ,  ARNDT RICHARD LOUIS ,  CORRIGAN MICHAEL JOSEPH ,  ENGEBRETSEN DAVID ROBERT ,  MARCHINI TIMOTHY RICHARD ,  NAYAR NARESH

Inventor： ARMSTRONG WILLIAM JOSEPH ,  ARNDT RICHARD LOUIS ,  CORRIGAN MICHAEL JOSEPH ,  ENGEBRETSEN DAVID ROBERT ,  MARCHINI TIMOTHY RICHARD ,  NAYAR NARESH

IPC: G06F12/10

CPC classification number: G06F3/065 ,  G06F3/0611 ,  G06F3/0673 ,  G06F12/109

Abstract: Managing computer memory in a computer with dynamic logical partitioning that operates transparently with respect to operating systems in logical partitions. Exemplary methods, systems, and products are described for managing computer memory in a computer with dynamic logical partitioning that include copying by a hypervisor, from page frames in one logical memory block ("LMB") of a logical partition ("LPAR") to page frames outside the LMB, contents of page frames having page frame numbers in a page table for an operating system in the LPAR. Embodiments typically include storing new page frame numbers in the page table, including storing by the hypervisor, for each page frame whose contents are copied, a new page frame number that identifies the page frame to which contents are copied. In typical embodiments, copying contents of page frames and storing new page frame numbers are carried out transparently with respect to the operating system.

Abstract translation: 在具有相对于逻辑分区中的操作系统透明运行的动态逻辑分区的计算机中管理计算机内存。 描述了用于在具有动态逻辑划分的计算机中管理计算机存储器的示例性方法，系统和产品，其包括由管理程序从逻辑分区（“LPAR”）的一个逻辑存储块（“LMB”）中的页面帧到 在LMB之外的页框，在LPAR中的操作系统的页表中具有页框号的页框内容。 实施例通常包括在页面表中存储新的页面帧号码，包括由管理程序存储针对其内容被复制的每个页面帧的新的页面帧号码，其标识内容被复制到的页面帧。 在典型的实施例中，相对于操作系统透明地执行复印页面的内容和存储新的页面帧号码。

公开(公告)号：JP2006127524A

公开(公告)日：2006-05-18

申请号：JP2005313466

申请日：2005-10-27

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： ARMSTRONG WILLIAM JOSEPH ,  ARNDT RICHARD LOUIS ,  BENHASE MICHAEL THOMAS ,  BLOUNT LAWRENCE CARTER ,  HSU YU-CHENG ,  NAYAR NARESH

IPC: G06F9/50 ,  G06F9/46

CPC classification number: G06F9/5077 ,  G06F9/4881 ,  G06F2209/5014

Abstract: PROBLEM TO BE SOLVED: To provide an improved method for managing access to a resource included in a data processing environment logically partitioned by a partition.
SOLUTION: This device, this program and this method assure a temporal period in which use of a resource by the partition is not forcibly excluded by a hypervisor. Inquiry communication transmitted by the partition urges the hypervisor to determine whether work for the hypervisor in a pending state or not. If not, the hypervisor transmits an assurance response for assuring the period of uninterrupted use of the resource by the partition.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种用于管理对由分区进行逻辑分区的数据处理环境中包括的资源的访问的改进方法。 解决方案：该设备，该程序和该方法确保了一个时间段，在该时间段内，分区的资源使用不被管理程序强制排除。 由分区发送的查询通信会敦促管理程序确定管理程序是否处于待处理状态。 如果没有，则管理程序发送保证响应，以确保分区不间断地使用资源的时间段。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2004326743A

公开(公告)日：2004-11-18

申请号：JP2004087908

申请日：2004-03-24

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： ARMSTRONG WILLIAM JOSEPH ,  LARSON DAVID ANTHONY ,  NAYAR NARESH

IPC: G06F9/46 ,  G06F9/455 ,  G06F9/48 ,  G06F13/24

CPC classification number: G06F9/45533 ,  G06F13/24

Abstract: PROBLEM TO BE SOLVED: To provide a method, system, and a program article of manufacture for processing virtual interrupts in a logically partitioned system. SOLUTION: An intelligent virtual global interrupt queue (virtual GIQ) that may be associated with a plurality of virtual processors running in a logical partition may be utilized. Upon receiving a virtual interrupt, the virtual GIQ may examine the operating states of the associated virtual processors. In an effort to ensure the virtual interrupt is processed as quickly as possible, the virtual GIQ may present the virtual interrupt to one of the associated virtual processors determined to be in an operating state best suited for processing the virtual interrupt. COPYRIGHT: (C)2005,JPO&NCIPI

公开(公告)号：JP2008171428A

公开(公告)日：2008-07-24

申请号：JP2008001409

申请日：2008-01-08

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： FRAZIER GILES ROGER ,  CORRIGAN MICHAEL J ,  RICHARD LEWIS ARNT ,  ARMSTRONG WILLIAM JOSEPH ,  O'QUIN II JOHN THOMAS ,  NAYAR NARESH ,  MARCHINI TIMOTHY RICHARD ,  CATHY MAY

IPC: G06F9/30

CPC classification number: G06F9/30101 ,  G06F9/30181 ,  G06F9/468

Abstract: PROBLEM TO BE SOLVED: To provide a method and a system for selecting an architecture level to which a processor appears to conform in specification within a computing environment in order to achieve efficient program execution and migration among processor architectures with different levels.
SOLUTION: The method utilizes a processor compatibility register (PCR) that controls an architecture level that the processor appears to support. In one embodiment, the PCR is accessible only by super-privileged software. The super-privileged software sets bits in the PCR that specify the architecture level that the processor is to appear to support so that when the program runs on the processor, the processor behaves in accordance with the architecture level for which the program is designed.
COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于在计算环境中选择处理器看起来符合规范的体系结构级别的方法和系统，以便在具有不同级别的处理器架构之间实现有效的程序执行和迁移。 解决方案：该方法利用处理器兼容性寄存器（PCR）来控制处理器似乎支持的架构级别。 在一个实施方案中，PCR仅可由超级特权软件访问。 超级特权软件设置PCR中的位，指定处理器将要支持的架构级别，以便当程序在处理器上运行时，处理器的行为与程序设计的架构级别相符。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：WO2007110294A3

公开(公告)日：2007-11-15

申请号：PCT/EP2007051898

申请日：2007-02-28

Applicant: IBM ,  IBM UK ,  ARMSTRONG WILLIAM JOSEPH ,  AZAGURY ALAIN CHARLES ,  DEKEL ELIEZER ,  FACTOR MICHAEL ,  HAYARDENY AMIRAM ,  BEN-YEHUDA SHMUEL

Inventor： ARMSTRONG WILLIAM JOSEPH ,  AZAGURY ALAIN CHARLES ,  DEKEL ELIEZER ,  FACTOR MICHAEL ,  HAYARDENY AMIRAM ,  BEN-YEHUDA SHMUEL

IPC: G06F11/14 ,  G06F9/44

CPC classification number: G06F11/1438 ,  G06F9/45558 ,  G06F11/1471 ,  G06F2009/45562 ,  G06F2009/45579 ,  G06F2201/815 ,  G06F2201/82

Abstract: A method for storing multiple types of information, the method includes: storing information representative of a content of a persistent memory entity at a certain point in time; and storing information representative of a state of a virtual machine at the certain point in time. A computer program product including a computer usable medium including a computer readable program, wherein the computer readable program when executed on a computer causes the computer to: store information representative of a content of a persistent memory entity at a certain point in time; and store information representative of a state of a virtual machine at the certain point in time.

Abstract translation: 一种用于存储多种类型的信息的方法，所述方法包括：在特定时间点存储表示持久存储器实体的内容的信息; 以及存储表示所述特定时刻的虚拟机的状态的信息。 一种计算机程序产品，包括包括计算机可读程序的计算机可用介质，其中当在计算机上执行时所述计算机可读程序使得所述计算机在以下时间段中存储表示持久存储器实体的内容的信息; 并存储代表虚拟机的状态的信息。

公开(公告)号：WO2004081700A3

公开(公告)日：2005-07-21

申请号：PCT/GB2004000874

申请日：2004-03-03

Applicant: IBM ,  IBM UK ,  ARMSTRONG TROY DAVID ,  ARMSTRONG WILLIAM JOSEPH ,  EIDE CURTIS SHANNON ,  NORDSTROM GREGORY MICHAEL

Inventor： ARMSTRONG TROY DAVID ,  ARMSTRONG WILLIAM JOSEPH ,  EIDE CURTIS SHANNON ,  NORDSTROM GREGORY MICHAEL

IPC: G06F20060101 ,  G06F9/00 ,  G06F9/445 ,  G06F9/46 ,  G06F9/50 ,  G06F12/00

CPC classification number: G06F9/5077 ,  G06F9/4406

Abstract: A resource and partition manager includes a power on/power off mechanism that is used to assure a hardware resource is powered down when control of the resource is removed from a logical partition, and to assure the hardware resource is powered up when control of the hardware resource is transferred to a logical partition. In the alternative, the resource and partition manager may simply place the hardware resource in a power on reset state when the hardware resource is transferred to a logical partition. In this manner, when made available to a partition, the hardware resource is in a power-on reset state, which is the state typically expected by the logical partition.

Abstract translation: 资源和分区管理器包括上电/断电机制，用于确保当从逻辑分区移除资源的控制时硬件资源被断电，并且当控制硬件时确保硬件资源被加电 资源被传送到逻辑分区。 替代地，当硬件资源被传送到逻辑分区时，资源和分区管理器可以简单地将硬件资源置于上电复位状态。 以这种方式，当可用于分区时，硬件资源处于通电复位状态，这是逻辑分区通常预期的状态。

公开(公告)号：WO2004081699A3

公开(公告)日：2005-01-20

申请号：PCT/GB2004000868

申请日：2004-03-03

Applicant: IBM ,  IBM UK ,  ARMSTRONG TROY DAVID ,  ARMSTRONG WILLIAM JOSEPH ,  EIDE CURTIS SHANNON ,  NORDSTROM GREGORY MICHAEL

Inventor： ARMSTRONG TROY DAVID ,  ARMSTRONG WILLIAM JOSEPH ,  EIDE CURTIS SHANNON ,  NORDSTROM GREGORY MICHAEL

IPC: G06F20060101 ,  G06F1/26 ,  G06F9/46 ,  G06F9/50 ,  G06F12/00 ,  G06F13/00

CPC classification number: G06F9/5011 ,  G06F1/26 ,  G06F9/5077

Abstract: A resource and partition manager of the preferred embodiments includes a lock mechanism that operates on a plurality of locks that control access to individual hardware resources. The resource and partition manager uses the lock mechanism to obtain a lock on a hardware resource when transferring control of the hardware resource to a logical partition that is powering on and when removing the hardware resource from a logical partition that is powering off. The resource and partition manager uses the lock mechanism to remove control of a hardware resource from, or return control to, an operating logical partition in order to facilitate hardware service operations on that hardware resource or on the physical enclosure in which it is contained. The preferred embodiments also include methods for releasing system resources and address bindings allocated to a hardware resource when control the hardware resource is removed from a logical partition.

Abstract translation: 优选实施例的资源和分区管理器包括对控制对各个硬件资源的访问的多个锁操作的锁定机制。 资源和分区管理器在将硬件资源的控制转移到正在上电的逻辑分区以及从正在关闭的逻辑分区中删除硬件资源时，使用锁定机制来获取硬件资源上的锁定。 资源和分区管理器使用锁定机制来从硬件资源或操作逻辑分区的控制中移除硬件资源的控制，以便于硬件资源或其所包含的物理外壳上的硬件服务操作。 优选实施例还包括当控制从逻辑分区移除硬件资源时释放系统资源和分配给硬件资源的绑定的方法。

公开(公告)号：GB2492620A

公开(公告)日：2013-01-09

申请号：GB201208064

申请日：2012-05-09

Applicant: IBM

Inventor： TRI STEVEN MICHAEL ,  O'CONNOR JAMES ,  HOLLAND WILLIAM GAVIN ,  ENGEBRETSEN DAVID ,  HUGHES JAMES EDWARD ,  ARMSTRONG WILLIAM JOSEPH ,  CRIPPEN MARTIN JOSEPH ,  DESAI DHRUV MANMOHANDAS ,  BORKENHAGEN JOHN MICHAEL ,  HILLIER PHILIP ROGERS III ,  PATEL PRAVIN

IPC: G06F13/40 ,  H04L69/40

Abstract: In a switching system (fig. 1) comprising server card â bladesâ (104, fig. 1 & 202, fig. 6), a midplane 123 is connected to switch modules 4201-3 on different server cards thus providing a fabric interconnect for a switch fabric under the operation of a management controller (1604, fig. 16) which updates and monitors the switch modules, and informs others when one fails. Switch modules may be replaced (â hot swappedâ ) without restarting the system or fabric.