公开(公告)号：CA1165468A

公开(公告)日：1984-04-10

申请号：CA395695

申请日：1982-02-05

Applicant: IBM

Inventor： BHATTACHARYA SOMNATH ,  HU SHIH-MING ,  KOOPMAN NICHOLAS G ,  OLDAKOWSKI CHESTER C

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/532 ,  H05K3/30 ,  H01L21/88

Abstract: Solder Mound Formation On Substrates A controlled geometric configuration of contact pads for securing solder mounds to an integrated circuit chip which reduces cracking of brittle passivating coatings in fabrication of components. FI9-81-013

公开(公告)号：DE3276841D1

公开(公告)日：1987-08-27

申请号：DE3276841

申请日：1982-03-01

Applicant: IBM

Inventor： BHATTACHARYA SOMNATH ,  HU SHIH-MING ,  KOOPMAN NICHOLAS GEORGE ,  OLDAKOWSKI CHESTER CHARLES

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/532 ,  H01L23/48

Abstract: A controlled geometric configuration of contact pads (1) for securing solder mounds to semiconductor chip reduces cracking of brittle passivating coatings (58) in the fabrication of components. A bottom Cr layer (2), a concentric intermediate Cr/Cu layer (4) and a top Cu layer (3) have tapered, wedge-shaped peripheral portions. The intermediate and the top layers have about the same diameter, whereas the bottom layer is larger.

公开(公告)号：DE3379820D1

公开(公告)日：1989-06-08

申请号：DE3379820

申请日：1983-06-01

Applicant: IBM

Inventor： BHATTACHARYA SOMNATH ,  CHANCE DUDLEY AUGUSTUS ,  KOOPMAN NICHOLAS GEORGE ,  RAY SUDIPTA KUMAR

IPC: H01L23/52 ,  H01L23/498 ,  H01L23/538 ,  H05K3/24

Abstract: A method of preparing a conductor for solder bonding and a substrate to which this method may be applied. The method involves the use of three layers comprising a conductor layer 32, a barrier layer 33 and a solder wettable layer 35'. Solder bonds may be made to this solder wettable layer. During thermal cycling there may, in the absence of the barrier layer, be a tendency for material from the conductor layer to diffuse into the solder wettable layer and thence into the solder where it can form intermetallic alloys with Sn in the solder, causing the solder to become brittle and liable to failure. The inclusion of a barrier layer of suitable material, eg Cr or Co, reduces this diffusion and hence increases the reliability of the solder bonds. Optionally, the method includes provision for solderless bonding by thermocompression or ultrasonic bonding. This may be performed on the barrier layer at 37 or it may be performed elsewhere.

公开(公告)号：DE3378604D1

公开(公告)日：1989-01-05

申请号：DE3378604

申请日：1983-12-06

Applicant: IBM

Inventor： BHATTACHARYA SOMNATH

IPC: H01L21/60 ,  B23K35/00 ,  H01L23/485 ,  H01L23/532 ,  H01L23/52 ,  H01L23/48

Abstract: Contact metallurgy is disclosed for passivated semiconductor devices. The metallurgy comprises a compressively stressed, oxygen-containing titanium underlayer (5) covered by a solder-bondable layer (6) extending through via holes in dielectric material (4) on the semiconductor device. The solder bondable layer is either nickel or ruthenium, where lower current densities are encountered or a composite of layers of copper, titanium, copper and gold for higher current densities.

公开(公告)号：DE3278896D1

公开(公告)日：1988-09-15

申请号：DE3278896

申请日：1982-04-15

Applicant: IBM

Inventor： BHATTACHARYA SOMNATH ,  KOOPMAN NICHOLAS GEORGE ,  TOTTA PAUL ANTHONY

IPC: H05K1/18 ,  H01L21/60 ,  H01L23/485 ,  H01L23/48