公开(公告)号：EP1661163A4

公开(公告)日：2008-08-06

申请号：EP04782258

申请日：2004-08-26

Applicant: IBM

Inventor： BURNHAM JAY S ,  NAKOS JAMES S ,  QUINLIVAN JAMES J ,  ROQUE BERNIE JR ,  SHANK STEVEN M ,  WARD BETH A

IPC: H01L21/28 ,  H01L20060101 ,  H01L21/31 ,  H01L21/314 ,  H01L21/336 ,  H01L21/469 ,  H01L29/51

CPC classification number: H01L21/28202 ,  H01L21/28035 ,  H01L21/3144 ,  H01L29/518

Abstract: A method of fabricating a gate dielectric layer, including: providing a substrate (100); forming a silicon dioxide layer (110) on a top surface of the substrate (105); performing a plasma nitridation in a reducing atmosphere to convert the silicon dioxide layer into a silicon oxynitride layer (110A). The dielectric layer so formed may be used in the fabrication of MOSFETs (145).

公开(公告)号：JP2005210123A

公开(公告)日：2005-08-04

申请号：JP2005011499

申请日：2005-01-19

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： BURNHAM JAY S ,  ELLIS-MONAGHAN JOHN J ,  NAKOS JAMES S ,  QUINLIVAN JAMES J

IPC: H01L27/092 ,  H01L21/318 ,  H01L21/8238 ,  H01L29/78

CPC classification number: H01L21/823857

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor structure including a thin gate dielectric in which nitrogen is selectively enriched.
SOLUTION: Although an introducing amount of nitrogen is sufficient to cause gate leakage and the infiltration of a dopant to be reduced, or to prevent these, the amount does not decrease device performance much. Nitrogen lower than that of a gate dielectric of nFET in density is introduced into a gate dielectric of a pFET. Nitriding can be selectively carried out by rapid thermal nitridation (RTN), furnace nitriding, remote plasma nitriding (RPN), decoupled plasma nitriding (DPN), and wale implantation or polysilicon implantation, or by various techniques, including combinations of these methods.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 解决的问题：提供一种包括选择性富集氮气的薄栅电介质的半导体结构。 解决方案：尽管氮的引入量足以导致栅极泄漏和掺杂剂的渗透减少，或者为了防止这些，但是量不会大大降低器件性能。 低于nFET的栅极电介质的密度的氮被引入pFET的栅极电介质中。 氮化可以通过快速热氮化（RTN），炉氮化，远程等离子体氮化（RPN），去耦等离子体氮化（DPN），纵行注入或多晶硅注入，或通过各种技术（包括这些方法的组合）来选择性地进行。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2004048001A

公开(公告)日：2004-02-12

申请号：JP2003183483

申请日：2003-06-26

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： BURNHAM JAY S ,  CHOU ANTHONY I ,  FURUKAWA TOSHIHARU ,  MARGARET L GIBSON ,  NAKOS JAMES S ,  SHANK STEVEN M

IPC: H01L21/318 ,  H01L21/28 ,  H01L21/314 ,  H01L21/324 ,  H01L21/336 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L21/28194 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/3144 ,  H01L21/324 ,  H01L29/4908 ,  H01L29/518 ,  H01L29/66757

Abstract: PROBLEM TO BE SOLVED: To provide a highly reliable gate insulation film with respect to a gate insulation film forming method by silicon nitride oxide. SOLUTION: The gate insulation film forming method includes a process for preparing a substrate, a process for forming a silicon dioxide layer on the top surface of the substrate, a process for exposing the silicon dioxide layer to a plasma-nitride forming process in order to change the silicon dioxide layer into a silicon nitride oxide layer, and a process for subjecting the silicon nitride oxide layer to spike-like rapid annealing. COPYRIGHT: (C)2004,JPO

公开(公告)号：WO2005020291A2

公开(公告)日：2005-03-03

申请号：PCT/US2004027740

申请日：2004-08-26

Applicant: IBM ,  BURNHAM JAY S ,  NAKOS JAMES S ,  QUINLIVAN JAMES J ,  ROQUE BERNIE JR ,  SHANK STEVEN M ,  WARD BETH A

Inventor： BURNHAM JAY S ,  NAKOS JAMES S ,  QUINLIVAN JAMES J ,  ROQUE BERNIE JR ,  SHANK STEVEN M ,  WARD BETH A

IPC: H01L20060101 ,  H01L21/31 ,  H01L21/336 ,  H01L21/469 ,  H01L

CPC classification number: H01L21/28202 ,  H01L21/28035 ,  H01L21/3144 ,  H01L29/518

Abstract: A method of fabricating a gate dielectric layer, including: providing a substrate (100); forming a silicon dioxide layer (110) on a top surface of the substrate (105); performing a plasma nitridation in a reducing atmosphere to convert the silicon dioxide layer into a silicon oxynitride layer (110A). The dielectric layer so formed may be used in the fabrication of MOSFETs (145).

Abstract translation: 一种制造栅极电介质层的方法，包括：提供衬底（100）; 在所述衬底（105）的顶表面上形成二氧化硅层（110）; 在还原气氛中进行等离子体氮化，将二氧化硅层转换成氮氧化硅层（110A）。 如此形成的电介质层可用于制造MOSFET（145）。