公开(公告)号：JP2001285364A

公开(公告)日：2001-10-12

申请号：JP2001052146

申请日：2001-02-27

Applicant: IBM

Inventor： LUIJTEN RONALD P ,  COLMANT MICHEL

IPC: H04L12/70 ,  H04L12/931 ,  H04L12/935 ,  H04L12/937 ,  H04L12/56

Abstract: PROBLEM TO BE SOLVED: To provide a switching apparatus including several input ports and several output ports. SOLUTION: The input ports can be connected to each corresponding switch adaptor. Routing of data packets that arrive at the output port from the input port is controlled by at least one switch controller. A congestion controller is provided at each output port. The congestion controller generates during its operation permission information for notifying whether the switch adaptor can transmit the data packets to the output ports. For each input port, when a data packet is received at an input port during a data packet access controller s operation although its transmission is not permitted, the data packet is marked as disapproval by the data packet access controller.

公开(公告)号：AT331369T

公开(公告)日：2006-07-15

申请号：AT01100625

申请日：2001-01-11

Applicant: IBM

Inventor： LUIJTEN RONALD P ,  COLMANT MICHEL

IPC: H04L49/111 ,  H04L12/56

Abstract: A switching device comprising several input ports and several output ports, whereby each of the input ports is connectable to a corresponding switch adapter. At least one switch controller controls the routing of incoming data packets from the input ports to the output ports. For each output port a congestion controller is arranged which in operation, generates grant information which signals whether the switch adapters are allowed to send the data packet to the output port. For each of the input ports a data packet access controller marks a data packet as non-compliant if the packet was erroneously sent from said output port.

公开(公告)号：DE60127366T2

公开(公告)日：2007-11-29

申请号：DE60127366

申请日：2001-11-16

Applicant: IBM

Inventor： COLMANT MICHEL ,  GRAMSAMER FERDINAND ,  MINKENBERG CYRIEL

IPC: H04L12/54 ,  H04L12/70 ,  H04L12/931 ,  H04L12/933

Abstract: The present invention relates to switching in electronic networks. Many data transmission protocols and technologies used in such networks, such as TCP/IP and Ethernet, use variable-length packets for transmission. Often however, the nodes that make up these networks typically contain high-speed cell switches that only support fixed-size data units. To support variable-length packets in such a fixed-size cell switch non-interleaving switching and transmission must be offered. The present invention provides such a solution in essence by segmenting a variable-length frame into a plurality of fixed-length cells including a start-of-frame cell, one or more continuation cell(s), and an end-of-frame cell and routes said fixed-length cells through said switch, thereby providing, at an output of said switch, subsequent and deadlock-free transmission of consecutive cells of a certain frame, and block any cell of a different frame from interleaving. This leads to better average delay characteristics and removes the need for packet reassembly.

公开(公告)号：AT357790T

公开(公告)日：2007-04-15

申请号：AT01811100

申请日：2001-11-16

Applicant: IBM

Inventor： COLMANT MICHEL ,  GRAMSAMER FERDINAND ,  MINKENBERG CYRIEL

IPC: H04L12/54 ,  H04L12/70 ,  H04L12/931 ,  H04L12/933 ,  H04L12/56

Abstract: The present invention relates to switching in electronic networks. Many data transmission protocols and technologies used in such networks, such as TCP/IP and Ethernet, use variable-length packets for transmission. Often however, the nodes that make up these networks typically contain high-speed cell switches that only support fixed-size data units. To support variable-length packets in such a fixed-size cell switch non-interleaving switching and transmission must be offered. The present invention provides such a solution in essence by segmenting a variable-length frame into a plurality of fixed-length cells including a start-of-frame cell, one or more continuation cell(s), and an end-of-frame cell and routes said fixed-length cells through said switch, thereby providing, at an output of said switch, subsequent and deadlock-free transmission of consecutive cells of a certain frame, and block any cell of a different frame from interleaving. This leads to better average delay characteristics and removes the need for packet reassembly.

公开(公告)号：DE69638095D1

公开(公告)日：2010-01-21

申请号：DE69638095

申请日：1996-07-09

Applicant: IBM

Inventor： COLMANT MICHEL ,  ENGBERSEN ANTONIUS P ,  HEDDES MARCO ,  VAN WEERT MARINUS J

IPC: H04Q3/00 ,  H04Q11/04 ,  H04L12/54 ,  H04L12/70 ,  H04L12/933

Abstract: PCT No. PCT/IB96/00658 Sec. 371 Date Apr. 13, 1998 Sec. 102(e) Date Apr. 13, 1998 PCT Filed Jul. 9, 1996 PCT Pub. No. WO98/02013 PCT Pub. Date Jan. 15, 1998The invention relates to a switching device which transports data packets from input ports to selected output ports. The payload of the packets is stored in a storage means. A switching means is arranged which has more switch outputs than switch inputs and which switches sequentially between one switch input and several switch outputs while storing the payloads. Furthermore, the invention relates to a storing method which uses switching means to store payloads in a sequential order and to a switching apparatus comprising several switching devices. Furthermore, the invention relates to systems using the switching device as a scaleable module.

公开(公告)号：DE60127366D1

公开(公告)日：2007-05-03

申请号：DE60127366

申请日：2001-11-16

Applicant: IBM

Inventor： COLMANT MICHEL ,  GRAMSAMER FERDINAND ,  MINKENBERG CYRIEL

IPC: H04L12/54 ,  H04L12/70 ,  H04L12/931 ,  H04L12/933

Abstract: The present invention relates to switching in electronic networks. Many data transmission protocols and technologies used in such networks, such as TCP/IP and Ethernet, use variable-length packets for transmission. Often however, the nodes that make up these networks typically contain high-speed cell switches that only support fixed-size data units. To support variable-length packets in such a fixed-size cell switch non-interleaving switching and transmission must be offered. The present invention provides such a solution in essence by segmenting a variable-length frame into a plurality of fixed-length cells including a start-of-frame cell, one or more continuation cell(s), and an end-of-frame cell and routes said fixed-length cells through said switch, thereby providing, at an output of said switch, subsequent and deadlock-free transmission of consecutive cells of a certain frame, and block any cell of a different frame from interleaving. This leads to better average delay characteristics and removes the need for packet reassembly.

公开(公告)号：DE60120807D1

公开(公告)日：2006-08-03

申请号：DE60120807

申请日：2001-01-11

Applicant: IBM

Inventor： LUIJTEN RONALD P ,  COLMANT MICHEL

IPC: H04L49/111

Abstract: A switching device comprising several input ports and several output ports, whereby each of the input ports is connectable to a corresponding switch adapter. At least one switch controller controls the routing of incoming data packets from the input ports to the output ports. For each output port a congestion controller is arranged which in operation, generates grant information which signals whether the switch adapters are allowed to send the data packet to the output port. For each of the input ports a data packet access controller marks a data packet as non-compliant if the packet was erroneously sent from said output port.

公开(公告)号：DE60317890T2

公开(公告)日：2008-11-27

申请号：DE60317890

申请日：2003-03-31

Applicant: IBM

Inventor： ABEL FRANCOIS G ,  BENNER ALAN ,  BLANC ALAIN ,  COLMANT MICHEL ,  GUSAT MITCH ,  PORET MICHEL ,  SCHUMACHER NORBERT ,  VERHAPPEN MARK

IPC: H04L12/56 ,  H04Q11/04

Abstract: A communication system which consists of several modules—operating in parallel on segments of a packet—to increase speed and handling capacity. One module acts as master, the others are slave modules controlled by control signals derived by the master module. It is important that in each module the data segment and the respective control signal of each packet are correctly synchronized, because in large systems the data paths carrying packet segments and the control signal paths may have substantially different delays. The invention provides for measurement of the propagation delay differences and for introducing a controlled delay in each slave module, so that data segments and control signals can be correctly correlated by delaying either the one or the other. Synchronization packets are transmitted besides normal data packets, for obtaining time stamps which are used to determine the delay difference.

公开(公告)号：DE60317890D1

公开(公告)日：2008-01-17

申请号：DE60317890

申请日：2003-03-31

Applicant: IBM

Inventor： ABEL FRANCOIS G ,  BENNER ALAN ,  BLANC ALAIN ,  COLMANT MICHEL ,  GUSAT MITCH ,  PORET MICHEL ,  SCHUMACHER NORBERT ,  VERHAPPEN MARK

IPC: H04L12/56 ,  H04Q11/04

Abstract: A communication system which consists of several modules—operating in parallel on segments of a packet—to increase speed and handling capacity. One module acts as master, the others are slave modules controlled by control signals derived by the master module. It is important that in each module the data segment and the respective control signal of each packet are correctly synchronized, because in large systems the data paths carrying packet segments and the control signal paths may have substantially different delays. The invention provides for measurement of the propagation delay differences and for introducing a controlled delay in each slave module, so that data segments and control signals can be correctly correlated by delaying either the one or the other. Synchronization packets are transmitted besides normal data packets, for obtaining time stamps which are used to determine the delay difference.

公开(公告)号：DE60120807T2

公开(公告)日：2006-12-28

申请号：DE60120807

申请日：2001-01-11

Applicant: IBM

Inventor： LUIJTEN RONALD P ,  COLMANT MICHEL

IPC: H04L49/111

Abstract: A switching device comprising several input ports and several output ports, whereby each of the input ports is connectable to a corresponding switch adapter. At least one switch controller controls the routing of incoming data packets from the input ports to the output ports. For each output port a congestion controller is arranged which in operation, generates grant information which signals whether the switch adapters are allowed to send the data packet to the output port. For each of the input ports a data packet access controller marks a data packet as non-compliant if the packet was erroneously sent from said output port.