公开(公告)号：JP2002141948A

公开(公告)日：2002-05-17

申请号：JP2001281049

申请日：2001-09-17

Applicant: IBM

Inventor： LUIJTEN RONALD P ,  MINKENBERG CYRIEL ,  SCHUMACHER NORBERT ,  JUERGEN KEHR ,  LEPPLA BERND

IPC: H04L12/851 ,  H04L12/931 ,  H04L12/933 ,  H04L12/935 ,  H04L12/56

Abstract: PROBLEM TO BE SOLVED: To provide a switching configuration to transport a data packet including data packet destination information and a payload to one output port or more. SOLUTION: Each input port 20 of a switching device 10 has an output buffer 35 that stores a payload of each data packet arrived in each input port 20 to its address. Furthermore, each input port 20 is provided with output queues whose number is the same as that of output ports 30. Each output queue stores addresses of each payload stored in the output buffer 35 and they are classified depending on data packet destination information. The stored payload can be sent to at least one of the output ports 30 under the use of the stored addresses at the point of time and pointed out by the addresses.

公开(公告)号：GB2365665B

公开(公告)日：2003-11-12

申请号：GB0107149

申请日：2001-03-22

Applicant: IBM

Inventor： MINKENBERG CYRIEL

IPC: H04L49/111 ,  H04Q11/04 ,  H04L12/56 ,  H04L29/06

Abstract: The invention is related to a switching arrangement for transporting data packets which comprise a section with data packet destination information and a payload section, to one or more output ports. The switching device is able to route the arriving data packets according to the data packet destination information, to at least one dedicated of the output ports. It comprises at each input port an input buffer with at least as many single input queues as there are output ports, and an input controller for each input port, serving for controlling the order of multiplexing the data packets from the input queues of the corresponding input buffer to the switching device. The input buffer comprises a demultiplexer for making for each of the arriving data packets an entry into those of the input queues, which are identified in the packet destination information of the corresponding data packet, whereby each input controller is designed to allow simultaneous transmission of those data packets whose entries are located in different input queues and whose payload sections have identical content.

公开(公告)号：DE112011100198B4

公开(公告)日：2017-09-21

申请号：DE112011100198

申请日：2011-04-20

Applicant: IBM

Inventor： GUSAT MIRCEA ,  MINKENBERG CYRIEL ,  DE CUSATIS CASIMER ,  CRISAN DANIEL

IPC: H04L45/125 ,  H04L45/121 ,  H04L47/765 ,  H04W40/04 ,  H04W40/34

Abstract: Verfahren zum Untersuchen einer Überlastung in einem Computernetzwerk, das Folgendes umfasst: Senden eines Prüfpakets an Netzwerkeinheiten (14a–14n) von einem Quellknoten (16), um Daten über Datenverkehrs-Warteschlangen an jeder Netzwerkeinheit (14a–14n) einzuholen, die von dem Prüfpaket untersucht wird; und Anlegen einer Leitweglenkungstabelle (18a–18n) an jeder Netzwerkeinheit (14a–14n), die das Prüfpaket empfängt, auf der Grundlage der eingeholten Daten für jede zugehörige Datenverkehrs-Warteschlange, wobei die Leitweglenkungstabelle (18a–18n) auf den eingeholten Daten für jede zugehörige Datenverkehrs-Warteschlange beruht, wobei ein Leitweg, auf dem Datenpakete von irgendeiner der Netzwerkeinheiten (14a–14n) gesendet werden, auf der jeweils zugehörigen Leitweglenkungstabelle (18a–18n) beruht, und ein Datenverkehr gemäß den über die Datenverkehrs-Warteschlangen eingeholten Daten neu gelenkt wird, wobei der Quellknoten (16) einen Überlastungsgrad auf jedem möglichen Pfad abschätzt, den ein Paket nehmen kann, und den Pfad mit den geringsten Pfadkosten auswählt.

公开(公告)号：GB2365665A

公开(公告)日：2002-02-20

申请号：GB0107149

申请日：2001-03-22

Applicant: IBM

Inventor： MINKENBERG CYRIEL

IPC: H04L49/111 ,  H04Q11/04 ,  H04L12/56 ,  H04L29/06

Abstract: A switching arrangement is provided for transporting data packets having a destination information section and a payload section via one or more input ports 20 of a switching device 15 to one or more output ports 30 according to the destination information. The arrangement comprises an input buffer 11 at each input port with at least as many single input queues 12 as there are output ports in the switching device and an input controller 25 for each input port controlling the associated input buffer. The input controller includes a demultiplexer 19 for making an entry for each incoming data packet on the input queue of the input buffer in accordance with the destination information of the data packet, and a multiplexer 21 for transferring said data packets from the input queues towards the switching device. The input controller is able to perform simultaneous transmission towards the switching device of at least some data packets in different input queues whose payload sections have identical content.

公开(公告)号：CA2337674A1

公开(公告)日：2001-10-20

申请号：CA2337674

申请日：2001-02-22

Applicant: IBM

Inventor： MINKENBERG CYRIEL

IPC: H04L49/111 ,  H04Q11/04 ,  H04L12/56

Abstract: The invention is related to a switching arrangement for transporting data packets which comprise a section with data packet destination information and a payload section, to one or more output ports. The switching device is able to route the arriving data packet s according to the data packet destination information, to at least one dedicated of the output port s. It comprises at each input port an input buffer with at least as many single input queues as ther e are output ports, and an input controller for each input port, serving for controlling the order of multiplexing the data packets from the input queues of the corresponding input buffer to the switching device. The input buffer comprises a demultiplexer for making for each of the arriving data packets a n entry into those of the input queues, which are identified in the packet destination information of the corresponding data packet, whereby each input controller is designed to allow simultaneous transmission of those data packets whose entries are located in different input queues and whose payloa d sections have identical content.

公开(公告)号：GB2525823A

公开(公告)日：2015-11-04

申请号：GB201516051

申请日：2014-01-30

Applicant: IBM

Inventor： KAMBLE KESHAV GOVIND ,  DECUSATIS CASIMER M ,  GUSAT MIRCEA ,  MINKENBERG CYRIEL ,  RECIO RENATO ,  PANDEY VIJOY A

IPC: H04L45/02 ,  H04L45/74

Abstract: In one embodiment, a system includes a network fabric having a plurality of fabric switches interconnected in the network fabric and a switch controller having logic adapted to configure the network fabric, determine one or more paths through the network fabric between any two hosts connected thereto, and create a source-routing table to store the one or more paths through the network fabric between any two hosts connected thereto. In another embodiment, a method includes receiving or creating a packet using a NIC of a host connected to a network fabric having a plurality of fabric switches interconnected therein, determining a path through the network fabric by consulting a source-routing table stored to the host, storing source-routing information to a packet header for the packet, the source- routing information including the path, and sending the packet to a first device or hop indicated by the path in the source-routing information.

公开(公告)号：DE60127366D1

公开(公告)日：2007-05-03

申请号：DE60127366

申请日：2001-11-16

Applicant: IBM

Inventor： COLMANT MICHEL ,  GRAMSAMER FERDINAND ,  MINKENBERG CYRIEL

IPC: H04L12/54 ,  H04L12/70 ,  H04L12/931 ,  H04L12/933

Abstract: The present invention relates to switching in electronic networks. Many data transmission protocols and technologies used in such networks, such as TCP/IP and Ethernet, use variable-length packets for transmission. Often however, the nodes that make up these networks typically contain high-speed cell switches that only support fixed-size data units. To support variable-length packets in such a fixed-size cell switch non-interleaving switching and transmission must be offered. The present invention provides such a solution in essence by segmenting a variable-length frame into a plurality of fixed-length cells including a start-of-frame cell, one or more continuation cell(s), and an end-of-frame cell and routes said fixed-length cells through said switch, thereby providing, at an output of said switch, subsequent and deadlock-free transmission of consecutive cells of a certain frame, and block any cell of a different frame from interleaving. This leads to better average delay characteristics and removes the need for packet reassembly.

公开(公告)号：GB2515643A

公开(公告)日：2014-12-31

申请号：GB201408988

申请日：2012-12-13

Applicant: IBM

Inventor： BASSO CLAUDE ,  ARMSTRONG WILLIAM ,  CHANG CHIH-JEN ,  GUSAT MIRCEA ,  NEESER FREDY ,  MINKENBERG CYRIEL ,  VALK KENNETH

IPC: H04L45/50

Abstract: IEEE 802.1Q and Enhanced Transmission Selection provide only eight different traffic classes that may be used to control bandwidth in a particular physical connection (or link). Instead of relying only on these eight traffic classes to manage bandwidth, the embodiments discussed herein disclose using an Enhanced Transmission Selection scheduler that permits a network device to set the bandwidth for an individual virtual LAN. Allocating bandwidth in a port based on a virtual LAN ID permits a network device to allocate bandwidth to, e.g., millions of unique virtual LANs. Thus, this technique may increase the granular control of the network fabric and its performance.

公开(公告)号：GB2508891A

公开(公告)日：2014-06-18

申请号：GB201222580

申请日：2012-12-14

Applicant: IBM

Inventor： HERRERA GERMAN RODRIGUEZ ,  GUSAT MIRCEA ,  MINKENBERG CYRIEL

IPC: H04L45/122 ,  H04L45/28

Abstract: Deadlock-free routing of data packets between source and destination switches in a fat tree network is provided. For each packet, a route is selected having three or less routing phases such that the route follows a shortest path across the network between the source and destination switches. The data packet is transmitted from the source switch to the destination switch, via the route, on one of first and second virtual channels unless the route includes a predetermined one of a down-up turn and an up-down turn (see e.g. figures 7 and 8). If the route includes the predetermined turn, the data packet is transmitted, via the route, on the first virtual channel up to the switch at which the turn occurs and on the second virtual channel from that switch. Direct fat tree networks, in which end nodes are connected to switches in a plurality of levels of the fat tree topology, are also provided.

公开(公告)号：DE102013111341A1

公开(公告)日：2014-06-18

申请号：DE102013111341

申请日：2013-10-15

Applicant: IBM

Inventor： MINKENBERG CYRIEL ,  HERRERA GERMAN RODRIGUEZ ,  MITCH GUSAT

IPC: H04L45/122 ,  H04L45/28

Abstract: Es werden Verfahren und eine Vorrichtung zum Routing von Datenpaketen zwischen Source- und Destination-Switches 1 in einem Fat-Tree-Netzwerk 10 bereitgestellt. Es wird für jedes Paket eine Route mit drei oder weniger Routing-Phasen ausgewählt, derart, dass die Route dem kürzesten Pfad über das Netzwerk 10 zwischen dem Source- und dem Destination-Switch folgt. Das Datenpaket wird von dem Source-Switch an den Destination-Switch über die besagte Route auf einem von einem ersten und einem zweiten virtuellen Kanal gesendet, bis die Route eine vorgegebene einer Abwärts-Aufwärts-Umkehrung oder einer Aufwärts-Abwärts-Umkehrung aufweist. Wenn die Route die vorgegebene einer Abwärts-Aufwärts-Umkehrung oder einer Aufwärts-Abwärts-Umkehrung aufweist, wird das Datenpaket über die Route auf dem ersten virtuellen Kanal bis zu Switch 1 gesendet, an dem die Umkehrung auftritt, und ab diesem Switch auf dem zweiten virtuellen Kanal gesendet. Dadurch wird volle Konnektivität in Fat-Tree-Netzwerken mit einer blockierungsfreien Funktion bereitgestellt. Direkte Fat-Tree-Netzwerke, in denen Endknoten mit Switches in einer Vielzahl von Ebenen der Fat-Tree-Topologie verbunden sind, werden ebenfalls bereitgestellt.