公开(公告)号：US3366819A

公开(公告)日：1968-01-30

申请号：US52701566

申请日：1966-02-14

Applicant: IBM

Inventor： CROWDER BILLY L ,  MOREHEAD FREDERICK F ,  WAGNER PETER R

IPC: H01L33/00

CPC classification number: H01L33/00

公开(公告)号：US3922708A

公开(公告)日：1975-11-25

申请号：US44810074

申请日：1974-03-04

Applicant: IBM

Inventor： CROWDER BILLY L ,  TAN SWIE-IN

IPC: H01L21/3205 ,  H01L21/02 ,  H01L21/265 ,  H01L21/3115 ,  H01L21/768 ,  H01L23/522 ,  H01L27/02

CPC classification number: H01L28/20 ,  H01L21/31155 ,  H01L23/522 ,  H01L2924/0002 ,  H01L2924/00

Abstract: High value resistors, of the order of 109 ohms/square and higher, are fabricated by implanting zinc or lead ions into a silicon dioxide layer over a silicon chip containing electrical components and/or circuits.

Abstract translation: 通过在包含电气元件和/或电路的硅芯片上注入锌或铅离子到二氧化硅层来制造大约为109欧姆/平方或更高的高值电阻器。

公开(公告)号：CA1130473A

公开(公告)日：1982-08-24

申请号：CA337644

申请日：1979-10-15

Applicant: IBM

Inventor： CROWDER BILLY L ,  GAENSSLEN FRITZ H ,  JAEGER RICHARD C

IPC: H01L29/78 ,  H01L21/265 ,  H01L29/10 ,  H01L29/167

Abstract: MOSFET SUBSTRATE SENSITIVITY CONTROL The sensitivity of the threshold voltage in MOSFET devices to changes in substrate voltage may be reduced at a given temperature by the introduction of sufficiently deep energy level, low diffusivity impurities into the depletion region under the gate of the MOSFET. Y0978-020

公开(公告)号：CA1160363A

公开(公告)日：1984-01-10

申请号：CA367000

申请日：1980-12-17

Applicant: IBM

Inventor： CROWDER BILLY L ,  ISAAC RANDALL D ,  NING TAK H

IPC: H01L29/73 ,  H01L21/033 ,  H01L21/331 ,  H01L23/485 ,  H01L29/10 ,  H01L21/22

Abstract: YO978-074 METHOD FOR ACHIEVING IDEAL IMPURITY BASE PROFILE IN A TRANSISTOR A method for making a transistor having base, collector, and emitter regions, where the impurity doping profile of the intrinsic and extrinsic base regions can closely approximate that which is ideal for the transistor. The extrinsic and intrinsic base regions are formed in separate steps, where the extrinsic base region is formed first, followed by formation of the intrinsic base region. The portion of the extrinsic base region located over the area where the intrinsic base region is to be formed is removed, leaving an opening through which both the emitter and the intrinsic base regions are formed. Thus, the effect of the step in which the extrinsic base region is formed is removed prior to formation of the intrinsic base region. Furthermore the extrinsic base region is protected during formation of the intrinsic base region. This technique can be applied to processes using either ion implantation or diffusion to form the emitter and base regions of the transistor.

公开(公告)号：CA1088217A

公开(公告)日：1980-10-21

申请号：CA300719

申请日：1978-04-07

Applicant: IBM

Inventor： CROWDER BILLY L ,  HUNTER WILLIAM R ,  ORMOND DOUGLAS W JR

IPC: H01L21/76 ,  H01L21/265 ,  H01L21/306 ,  H01L21/316 ,  H01L21/318 ,  H01L21/32 ,  H01L21/322 ,  H01L21/762

Abstract: METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES IN WHICH OXIDE REGIONS ARE FORMED BY AN OXIDATION MASK DISPOSED DIRECTLY ON A SUBSTRATE DAMAGED BY ION IMPLANTATION A method of manufacturing semiconductor devices of the type wherein regions of oxide such as silicon oxide recessed or inset in a silicon substrate are formed by oxidation of the silicon with the use of a masking layer protecting locally against the oxidation. In order to prevent the formation of a projecting oxide beak under the masking layer a nitride oxidation mask is applied directly to the substrate which has been previously ion-implanted to a controlled depth and then annealed to generate a dense dislocation network array on the substrate surface to prevent mechanical stress defects which normally would occur when a nitride mask is applied directly to a substrate.

公开(公告)号：CA1100648A

公开(公告)日：1981-05-05

申请号：CA301740

申请日：1978-04-21

Applicant: IBM

Inventor： CROWDER BILLY L ,  ZIRINSKY STANLEY

IPC: H01L21/60 ,  H01B13/00 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L23/52 ,  H01L29/49 ,  H01L29/78 ,  H01L21/36

Abstract: METHOD FOR PROVIDING A METAL SILICIDE LAYER ON A SUBSTRATE A method for providing on a substrate a layer of a metal silicide such as molybdenum silicide and/or tantalum silicide and/or tungsten silicide and/or rhodium silicide which includes coevaporating silicon and the respective metal onto a substrate, and then heat treating the substrate to form the metal silicide.

公开(公告)号：CA1023875A

公开(公告)日：1978-01-03

申请号：CA218279

申请日：1975-01-17

Applicant: IBM

Inventor： CROWDER BILLY L ,  TAN SWIE-IN

IPC: H01L21/3205 ,  H01L21/02 ,  H01L21/265 ,  H01L21/3115 ,  H01L21/768 ,  H01L23/522 ,  H01L

Abstract: High value resistors, of the order of 109 ohms/square and higher, are fabricated by implanting zinc or lead ions into a silicon dioxide layer over a silicon chip containing electrical components and/or circuits.

公开(公告)号：CA1120607A

公开(公告)日：1982-03-23

申请号：CA337494

申请日：1979-10-12

Applicant: IBM

Inventor： CROWDER BILLY L

IPC: H01L21/28 ,  H01L21/265 ,  H01L21/285

Abstract: CONTACTS TO SHALLOW P-N JUNCTIONS Deep penetration spikes, when a fused metal contact is made to semiconductor material, can be avoided by converting a portion of exposed crystalline semiconductor material to a layer of amorphous semiconductor material. The converted portion is the volume of the semiconductor material required to saturate the metal during a post-metallization annealing step. Y0978-004

公开(公告)号：DE2458734A1

公开(公告)日：1975-09-11

申请号：DE2458734

申请日：1974-12-12

Applicant: IBM

Inventor： CROWDER BILLY L ,  TAN SWIE-IN

IPC: H01L21/3205 ,  H01L21/02 ,  H01L21/265 ,  H01L21/3115 ,  H01L21/768 ,  H01L23/522 ,  H01L49/02 ,  H01L27/04

Abstract: High value resistors, of the order of 109 ohms/square and higher, are fabricated by implanting zinc or lead ions into a silicon dioxide layer over a silicon chip containing electrical components and/or circuits.