ADAPTOR SYSTEM FOR AN ETHERNET NETWORK
    1.
    发明公开

    公开(公告)号:EP2676388A4

    公开(公告)日:2017-12-20

    申请号:EP12747233

    申请日:2012-02-09

    Applicant: IBM

    CPC classification number: H04B10/07 H04J3/14 H04J2203/006 H04J2203/0085

    Abstract: An Ethernet adapter system may include a transmitter to insert a payload type identifier sequence in a generic frame procedure header to indicate that a network is a converged enhanced Ethernet network. The transmitter may insert idle sequences in a stream of data frames transmitted along a link. The system may include a receiver to recognize a condition and to force a loss of synchronization condition on the link that will be converted by the receiver into a loss of light condition. The receiver may scan the transmitted stream of data frames for invalid data frames and introduce a code into the stream of data frames whenever an invalid data frame is detected.

    METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR ADAPTIVE CONGESTION CONTROL ON VIRTUAL LANES FOR DATA CENTER ETHERNET ARCHITECTURE
    2.
    发明申请
    METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR ADAPTIVE CONGESTION CONTROL ON VIRTUAL LANES FOR DATA CENTER ETHERNET ARCHITECTURE 审中-公开
    用于数据中心以太网体系结构虚拟局域网自适应拥塞控制的方法,系统和计算机程序产品

    公开(公告)号:WO2009040229A4

    公开(公告)日:2009-05-14

    申请号:PCT/EP2008061715

    申请日:2008-09-04

    CPC classification number: H04L47/10 H04L47/25 H04L47/29

    Abstract: Congestion is adaptively controlled in a data center Ethernet (DCE) network. Packets are received over at least one virtual lane in the DCE network. An absolute or relative packet arrival rate is computed over a time period. The absolute or relative packet arrival rate is compared to at least a first threshold and a second threshold. If the absolute or relative packet arrival rate increases beyond the first threshold, the packet transmission rate is caused to decrease. If the absolute or relative packet arrival rate is less than a second threshold, the packet transmission rate is caused to increase.

    Abstract translation: 拥塞是在数据中心以太网(DCE)网络中自适应控制的。 数据包通过DCE网络中的至少一个虚拟通道接收。 在一段时间内计算绝对或相对包到达率。 将绝对或相对包到达率与至少第一阈值和第二阈值进行比较。 如果绝对或相对分组到达速率增加超过第一阈值,则使分组传输速率降低。 如果绝对或相对分组到达速率小于第二阈值,则使分组传输速率增加。

    METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR ADAPTIVE CONGESTION CONTROL ON VIRTUAL LANES FOR DATA CENTER ETHERNET ARCHITECTURE

    公开(公告)号:CA2699325C

    公开(公告)日:2016-03-15

    申请号:CA2699325

    申请日:2008-09-04

    Applicant: IBM

    Abstract: Congestion is adaptively controlled in a data center Ethernet (DCE) network. Packets are received over at least one virtual lane in the DCE network. An absolute or relative packet arrival rate is computed over a time period. The absolute or relative packet arrival rate is compared to at least a first threshold and a second threshold. If the absolute or relative packet arrival rate increases beyond the first threshold, the packet transmission rate is caused to decrease. If the absolute or relative packet arrival rate is less than a second threshold, the packet transmission rate is caused to increase.

    Adaptadores de habilitación/deshabilitación de un entorno de ordenadores

    公开(公告)号:ES2452871T3

    公开(公告)日:2014-04-03

    申请号:ES10779302

    申请日:2010-11-08

    Applicant: IBM

    Abstract: Un método para habilitar adaptadores en un entorno de ordenadores, que comprende las etapas de: responder para ejecutar una instrucción de Procesador Lógico de Llamada CLP (400) expedida por un sistema operativo para habilitar un adaptador seleccionado por el sistema operativo, comprendiendo la instrucción CLP un identificador de función (426) que identifica el adaptador y que tiene 5 un indicador de adaptador no habilitado (352), solicitando la instrucción CLP un número de espacios de direcciones de acceso directo a memoria DMA (430) para ser asignados al adaptador, habilitando la ejecución uno o más espacios de dirección DMA y que comprende: a) habilitar el adaptador, en donde la habilitación comprende habilitar el registro para la traducción e interrupción de dirección para el soporte de accesos de memoria directos e interrupciones señalizadas con mensaje para el adaptador, y en donde la habilitación comprende determinar (512) que el número de de espacios de dirección DMA solicitados está disponible comprobando que hay entradas de tabla de dispositivo para el número de espacios de dirección DMA solicitado, y asignar (542) un número de entradas de tabla de dispositivo, correspondiente al número de espacios de dirección de DMA solicitado, al adaptador; y b) devolver (550) el identificador de función que tiene un indicador de adaptador habilitado.

    STORE/STORE BLOCK INSTRUCTIONS FOR COMMUNICATING WITH ADAPTERS

    公开(公告)号:ZA201209562B

    公开(公告)日:2013-08-28

    申请号:ZA201209562

    申请日:2012-12-14

    Applicant: IBM

    Abstract: Communication with adapters of a computing environment is facilitated. Control instructions specifically designed for communicating data to and from adapters are provided to facilitate the communication. The instructions explicitly target the adapters. Information provided in an instruction is used to steer the instruction to an appropriate location within the adapter, such as a Peripheral Component Interconnect (PCI) or Peripheral Component Interconnect Express (PCIe) adapter.

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