公开(公告)号：DE3574650D1

公开(公告)日：1990-01-11

申请号：DE3574650

申请日：1985-06-24

Applicant: IBM

Inventor： HO CECIL TZECHOR ,  WILMAN JOHN GILBERT

IPC: H01J37/147 ,  H01J37/305 ,  H01L21/027 ,  H04N3/26

Abstract: A high speed focus control circuit for an electron beam projection system. The circuit includes a conventional digital to analog converter, comprising a register for storing an n-bit digital value, and n current drivers, each of which provides a current which is proportional to the associated bit weighted value. Rather than summing the currents from all n current drivers and driving a single focus coil, each current driver is connected to one of n individual coils, wound on a common bobbin. This reduces circuit capacitance and permits higher switching speed.

公开(公告)号：DE69023030T2

公开(公告)日：1996-05-30

申请号：DE69023030

申请日：1990-02-20

Applicant: IBM

Inventor： DAVIS DONALD EUGENE ,  HO CECIL TZECHOR ,  LIEBERMAN JON ERIK ,  PFEIFFER HANS ,  STURANS MARIS ANDRIS

IPC: H01L21/027 ,  H01J37/147 ,  H01J37/302 ,  H01J37/141 ,  H01J37/30

Abstract: A three-stage E-beam deflection system employs breaking the entire field to be scanned into clusters and sub-fields. The scanning provided by the first stage of deflection which scans within the entire field is rectilinear and discontinuous with the scan stopping in the center of each of the clusters where an exposure is to be made, and scanning is the same within each cluster from sub-field to sub-field. The scanning within a cluster by the second stage stops in the center of each sub-field where exposure is to be made. The third stage uses high speed electrostatic deflection to provide scanning with a vector scanning mode within the sub-field being scanned.

公开(公告)号：DE69023030D1

公开(公告)日：1995-11-23

申请号：DE69023030

申请日：1990-02-20

Applicant: IBM

Inventor： DAVIS DONALD EUGENE ,  HO CECIL TZECHOR ,  LIEBERMAN JON ERIK ,  PFEIFFER HANS ,  STURANS MARIS ANDRIS

IPC: H01L21/027 ,  H01J37/147 ,  H01J37/302 ,  H01J37/141 ,  H01J37/30

Abstract: A three-stage E-beam deflection system employs breaking the entire field to be scanned into clusters and sub-fields. The scanning provided by the first stage of deflection which scans within the entire field is rectilinear and discontinuous with the scan stopping in the center of each of the clusters where an exposure is to be made, and scanning is the same within each cluster from sub-field to sub-field. The scanning within a cluster by the second stage stops in the center of each sub-field where exposure is to be made. The third stage uses high speed electrostatic deflection to provide scanning with a vector scanning mode within the sub-field being scanned.

公开(公告)号：DE69018346T2

公开(公告)日：1995-10-12

申请号：DE69018346

申请日：1990-05-29

Applicant: IBM

Inventor： CLEMENT CLAY STUART ,  HO CECIL TZECHOR

IPC: H03M1/08 ,  H03M1/06 ,  H03M1/74 ,  H03M13/00 ,  H03M1/68

Abstract: A push pull digital-to-analog converter circuit configuration improves the signal-to-noise ratio when used in the common bipolar (both positive and negative) mode of operation, thereby improving its absolute accuracy. Digital data is supplied to a data buffer (11) which includes an inverter. The inverter supplies the data to one of a pair of push pull connected DACS (40, 50), referred to as dual DACS (30). The buffer (11) supplies the data to the other DAC without inversion. The outputs (41, 51) of the pair of DACS (40, 50) are combined by an op-amp circuit (60) which takes the two analog outputs from those circuits and combines them while the push pull circuits are opposed so noise is reduced and accuracy of the conversion is enhanced.

公开(公告)号：DE69018346D1

公开(公告)日：1995-05-11

申请号：DE69018346

申请日：1990-05-29

Applicant: IBM

Inventor： CLEMENT CLAY STUART ,  HO CECIL TZECHOR

IPC: H03M1/08 ,  H03M1/06 ,  H03M1/74 ,  H03M13/00 ,  H03M1/68

Abstract: A push pull digital-to-analog converter circuit configuration improves the signal-to-noise ratio when used in the common bipolar (both positive and negative) mode of operation, thereby improving its absolute accuracy. Digital data is supplied to a data buffer (11) which includes an inverter. The inverter supplies the data to one of a pair of push pull connected DACS (40, 50), referred to as dual DACS (30). The buffer (11) supplies the data to the other DAC without inversion. The outputs (41, 51) of the pair of DACS (40, 50) are combined by an op-amp circuit (60) which takes the two analog outputs from those circuits and combines them while the push pull circuits are opposed so noise is reduced and accuracy of the conversion is enhanced.