公开(公告)号：DE69115996T2

公开(公告)日：1996-07-11

申请号：DE69115996

申请日：1991-04-30

Applicant: IBM

Inventor： DAVIS CHARLES R ,  HSIAO RICHARD ,  LOOMIS JAMES R ,  PARK JAE M ,  REID JONATHAN D

IPC: H01R43/02 ,  B23K35/00 ,  B23K35/30 ,  H01R4/02 ,  H05K3/28 ,  H05K3/32 ,  H05K3/40 ,  H05K3/46

Abstract: A method is disclosed of simultaneously laminating circuitized dielectric layers to form a multilayer high performance circuit board and making interlevel electrical connections. The method selects two elements which will form a eutectic at one low temperature and will solidify to form an alloy which will only remelt at a second temperature higher than any required by any subsequent lamination. The joint is made using a transient liquid bonding technique and sufficient Au and Sn to result in a Au-Sn20wt% eutectic at the low temperature. Once solidified, the alloy formed remains solid throughout subsequent laminations. As a result, a composite, mulilayer, high performance circuit board is produced, electrically joined at selected lands by the solid alloy.

公开(公告)号：DE69020796D1

公开(公告)日：1995-08-17

申请号：DE69020796

申请日：1990-04-09

Applicant: IBM

Inventor： APPEL BERND K ,  BINDRA PERMINDER ,  EDWARDS ROBERT D ,  LOOMIS JAMES R ,  PARK JOE M ,  REID JONATHAN D ,  SMITH LISA J ,  WHITE JAMES R

IPC: C25D5/56 ,  H05K3/42

公开(公告)号：DE69020796T2

公开(公告)日：1996-03-14

申请号：DE69020796

申请日：1990-04-09

Applicant: IBM

Inventor： APPEL BERND K ,  BINDRA PERMINDER ,  EDWARDS ROBERT D ,  LOOMIS JAMES R ,  PARK JOE M ,  REID JONATHAN D ,  SMITH LISA J ,  WHITE JAMES R

IPC: C25D5/56 ,  H05K3/42

公开(公告)号：DE69115996D1

公开(公告)日：1996-02-15

申请号：DE69115996

申请日：1991-04-30

Applicant: IBM

Inventor： DAVIS CHARLES R ,  HSIAO RICHARD ,  LOOMIS JAMES R ,  PARK JAE M ,  REID JONATHAN D

IPC: H01R43/02 ,  B23K35/00 ,  B23K35/30 ,  H01R4/02 ,  H05K3/28 ,  H05K3/32 ,  H05K3/40 ,  H05K3/46

Abstract: A method is disclosed of simultaneously laminating circuitized dielectric layers to form a multilayer high performance circuit board and making interlevel electrical connections. The method selects two elements which will form a eutectic at one low temperature and will solidify to form an alloy which will only remelt at a second temperature higher than any required by any subsequent lamination. The joint is made using a transient liquid bonding technique and sufficient Au and Sn to result in a Au-Sn20wt% eutectic at the low temperature. Once solidified, the alloy formed remains solid throughout subsequent laminations. As a result, a composite, mulilayer, high performance circuit board is produced, electrically joined at selected lands by the solid alloy.