公开(公告)号：JP2001185634A

公开(公告)日：2001-07-06

申请号：JP2000340616

申请日：2000-11-08

Applicant: IBM

Inventor： DOUGLAS D KUURUBAAGU ,  JAMES S DAN ,  PETER J JEAYES ,  PETER B GRAY ,  DAVID L HALLAM ,  CATHRIN T SHOONENBAAGU ,  STEPHEN A SAINT ON ,  SESHADORI SAVANA

IPC: H01L21/328 ,  H01L21/762 ,  H01L21/763 ,  H01L21/8222 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06

Abstract: PROBLEM TO BE SOLVED: To provide a method for forming a BiMOS integrated circuit in which an FET and a bipolar element are formed on the same substrate. SOLUTION: The method for forming a BiMOS integrated circuit comprises a step for forming a collector at the first part of a bipolar element in the first region of a substrate, a step for protecting the first part of the bipolar element by forming a first protective layer on the first region, a step for forming a field effect transistor element in the second region of the substrate, a step for protecting the field effect transistor element by forming a second protective layer on the second region of the substrate, a step for removing the first protective layer, a step for forming a base and an emitter at the second part of the bipolar element, and a step for removing the second protective layer.

公开(公告)号：JP2002231727A

公开(公告)日：2002-08-16

申请号：JP2002004201

申请日：2002-01-11

Applicant: IBM

Inventor： COOLBAUGH DOUGLAS DUANE ,  DUPUIS MARK D ,  GALLAGHER MATTHEW D ,  PETER J JEAYES ,  PHILIPS BRETT A

IPC: H01L29/73 ,  H01L21/20 ,  H01L21/331 ,  H01L29/732 ,  H01L29/737

Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing an SiGe heterojunction bipolar transistor which reduces the SiGe base resistance. SOLUTION: An SiGe heterojunction bipolar transistor comprises a semiconductor substrate with a collector and a subcollector. The collector and the subcollector are formed between isolation regions existing within the substrate. Each isolation region comprises a recessed surface and a nonrecessed surface and these surfaces are formed by a lithography and an etching. An SiGe layer is formed on the substrate and the recessed and nonrecessed surfaces of each isolation region. The SiGe layer comprises a polycrystalline Si region and an SiGe base region. A patterned insulating layer is formed on the SiGe base region and moreover, an emitter is formed on the patterned insulating layer and comes into contact with the SiGe base region through an emitter window aperture.