公开(公告)号：AT550784T

公开(公告)日：2012-04-15

申请号：AT10700729

申请日：2010-01-08

Applicant: IBM

Inventor： ANDRY PAUL ,  TSANG CORNELIA ,  SPROGIS EDMUND ,  COTTE JOHN ,  TORNELLO JAMES ,  LOFARO MICHAEL

IPC: H01L21/768 ,  H01L23/48

Abstract: An assembly including a main wafer having a body with a front side and a back side and a plurality of blind electrical vias terminating above the back side, and a handler wafer, is obtained. A step includes exposing the blind electrical vias to various heights on the back side. Another step involves applying a first chemical mechanical polish process to the back side, to open any of the surrounding insulator adjacent the end regions of the cores remaining after the exposing step, and to co-planarize the via conductive cores, the surrounding insulator adjacent the side regions of the cores, and the body of the main wafer. Further steps include etching the back side to produce a uniform standoff height of each of the vias across the back side; depositing a dielectric across the back side; and applying a second chemical mechanical polish process to the back side.