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公开(公告)号:JP2002314253A
公开(公告)日:2002-10-25
申请号:JP2002060395
申请日:2002-03-06
Applicant: IBM
Inventor: JONES GERALD W , LAUFFER JOHN M , MARKOVICH VOYA R , MILLER THOMAS R , PAOLLETTI JAMES P , CONSTANTINOS I PAPATHOMAS , STACK JAMES R
Abstract: PROBLEM TO BE SOLVED: To provide a method which is newly simplified for forming a multilayer printed wiring board structure having a z-axis interconnection. SOLUTION: For forming a multilayer printed wiring board 10, a plurality of separate layers 12, 14, 16, 18 are shown, and in this example, the board 10 is constituted of four layers in total. As is well known, each layer is originally composed of a dielectric material such as an organic board, and on both surfaces thereof, namely on surfaces 12a, 12b, 14a, 14b, 16a, 16b, 18a, 18b, a suitable circulating plating, namely a wire is provided. As is well known, this is selectively adhered by use of a mask, etc. Each of the layers 12, 14, 16, 18 has a thickness 't' suitably in the range of about 0.50 mm (about 20 mil) to about 2.54 mm (about 100 mil) in correspondence to a size of a hole or a via formed therein.
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公开(公告)号:JP2004304172A
公开(公告)日:2004-10-28
申请号:JP2004073554
申请日:2004-03-15
Applicant: Internatl Business Mach Corp
, インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation Inventor: BRODSKY WILLIAM LOUIS , HOFFMEYER MARK KENNETH , STACK JAMES R
CPC classification number: H05K1/0271 , H05K1/0224 , H05K1/0253 , H05K1/112 , H05K2201/0191 , H05K2201/093 , H05K2201/09609 , H05K2201/09681 , H05K2201/09718 , H05K2201/10719 , Y10T29/49155 , Y10T29/49156
Abstract: PROBLEM TO BE SOLVED: To provide a method and a structure for reinforcing interconnection performance between a land grid array (LGA) module and an electrical connector such as a printed wiring board. SOLUTION: A multilayer printed wiring board comprises a plurality of preformed ground layers and power supply layers. At least one of the preformed ground layers and power supply layers comprises a structure for reducing a thickness change to a minimum in order to reduce changes in the thickness to a minimum. The structure for reducing the thickness change to a minimum comprises an aperture pattern in the selected area of at least one layer of the preformed ground layers and power supply layers. The selected area is located near a preformed module site such as an LGA module site in the ground layers and the power supply layers. The selected area may include a region surrounding each preformed module site and also can also include one region in the module site. COPYRIGHT: (C)2005,JPO&NCIPI
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