Abstract:
PROBLEM TO BE SOLVED: To provide a method for depositing a carbon nanotube on a flat surface according to a target. SOLUTION: Vapor deposition of the nanotube is performed by using a capillary of a range not more than a micrometer or a nanometer. A ram having a relief structure composed of an elastomer material is contacted with the flat surface. When liquid of a nanotube dispersing liquid is dripped on a certain surface, this liquid diffuses by receiving capillary force. Mobility of the nanotube in the capillary is determined by the size and an individual capillary shape, and a surface state has influence on the mobility of the nanotube. COPYRIGHT: (C)2004,JPO
Abstract:
The invention relates to an electrical circuit with at least one nanostructure and a carbon conductor track, said carbon conductor track being embodied by a layer essentially made from carbon, whereby the nanostructure and the carbon conductor track are in direct contact.
Abstract:
One embodiment of the present invention provides a method for the deposition of a Carbon containing layer on a Silicon surface wherein a (i) substantially Silicon-oxide-free or reduced oxide interface results between Silicon and the Carbon containing layer during the deposition. In another embodiment, the present invention provides a method for deposition of a Carbon containing layer wherein the deposition process is substantially soot (particle)-free or reduction of soot.
Abstract:
The method involves applying an electrically insulating layer (72) on a planarized surface of an integrated switching arrangement after the application of an electro conductive nucleation layer (74) on the surface. The insulating layer is structured so that areas of the nucleation layer are laid open. An electro conductive material is galvanically deposited on the areas laid open.
Abstract:
Process for nanotube deposition on planar surfaces comprises preparing stamp from elastomeric material having relief structure on one stamp surface, applying stamp to substrate so that substrate and stamp form microfluidic capillary system having inlet and outlet and made from one or more capillaries, contacting nanotube dispersion with capillary system inlet so that dispersion spreads in system under capillary force, drying dispersion, and removing stamp. An Independent claim is also included for an electronic component made from a substrate having discrete structures of nanotubes.
Abstract:
The present device relates to memory devices for storing electric charge having memory cells and transistors arranged spatially next to them, and relates in particular to memory devices having memory cells with a high capacitance. In the memory cells which form a memory device to which the invention relates, there is a substrate and at least one memory cell which is arranged on the substrate and includes a first electrode element, which is electrically connected to the substrate, an insulation layer, which has been applied to the first electrode element, and a second electrode element, which has been applied to the insulation layer and is electrically insulated from the first electrode element.
Abstract:
Process for nanotube deposition on planar surfaces comprises preparing stamp from elastomeric material having relief structure on one stamp surface, applying stamp to substrate so that substrate and stamp form microfluidic capillary system having inlet and outlet and made from one or more capillaries, contacting nanotube dispersion with capillary system inlet so that dispersion spreads in system under capillary force, drying dispersion, and removing stamp. An Independent claim is also included for an electronic component made from a substrate having discrete structures of nanotubes.
Abstract:
The method involves creating a through-hole (403) through a substrate of an integrated circuit arrangement, where the hole passes from a cover surface to a base surface of the arrangement. An electrically conductive nucleation layer (402) is superimposed at the base surface or cover surface before or after creating the hole. An electrically conductive material of a conducting structure is galvanically deposited in the hole. An independent claim is also included for an integrated circuit arrangement comprising a conducting structure.
Abstract:
The invention relates to a heat-conducting coating of electronic circuit assemblies ( 102 ), comprising a coating agent ( 100 ), which encloses the electronic circuit assembly ( 102 ) and which is electrically insulating, with dispersed particles in the coating agent ( 100 ) which have a high thermal conductivity, whereby the particles dispersed in the coating agent ( 100 ) are embodied as nanoelements ( 101 ).