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公开(公告)号：WO2004040668A3
公开(公告)日：2004-07-08
申请号：PCT/DE0303612
申请日：2003-10-30
Applicant: INFINEON TECHNOLOGIES AG , GRAHAM ANDREW , HOFMANN FRANZ , HOENLEIN WOLFGANG , KRETZ JOHANNES , KREUPL FRANZ , LANDGRAF ERHARD , LUYKEN RICHARD JOHANNES , ROESNER WOLFGANG , SCHULZ THOMAS , SPECHT MICHAEL
Inventor： GRAHAM ANDREW , HOFMANN FRANZ , HOENLEIN WOLFGANG , KRETZ JOHANNES , KREUPL FRANZ , LANDGRAF ERHARD , LUYKEN RICHARD JOHANNES , ROESNER WOLFGANG , SCHULZ THOMAS , SPECHT MICHAEL
CPC classification number: G11C13/025 , B82Y10/00 , G11C2213/17 , H01L27/283 , H01L51/0048 , H01L51/0052 , H01L51/0512
Abstract: The invention relates to a field effect transistor assembly and an integrated circuit array. The field effect transistor assembly contains a substrate, a first wiring plane with a first source/drain region on the substrate and a second wiring plane with a second source/drain region above the first wiring plane. The field effect transistor assembly also comprises at least one vertical nanoelement as a channel region, which is situated between and coupled to both wiring planes. The nanoelement is at least partially surrounded by electrically conductive material, forming a gate region, whereby electrically insulating material is provided between the nanoelement and the electrically conductive material to act as a gate insulating layer.
Abstract translation: 本发明涉及一种场效应晶体管装置和一种电路阵列。 场效应晶体管装置包括衬底，在衬底上具有第一源极/漏极区域的第一布线平面以及在第一布线平面上具有第二源极/漏极区域的第二布线平面。 此外，场效应晶体管装置包含至少一个垂直纳米元件作为沟道区域，其布置在布线平面之间并耦合到两者。 纳米元件至少部分地由导电材料包围的栅极区域，所述电绝缘材料作为纳米元件和所述导电材料之间的栅绝缘层提供。
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2.发明申请MEMORY CELL, MEMORY CELL ARRANGEMENT, STRUCTURING ARRANGEMENT AND METHOD FOR PRODUCTION OF A MEMORY CELL 审中-公开存储单元中，存储器单元装置，纹理安排及其制造方法的存储单元
公开(公告)号：WO2004040644A3
公开(公告)日：2004-08-12
申请号：PCT/DE0303589
申请日：2003-10-29
Applicant: INFINEON TECHNOLOGIES AG , GRAHAM ANDREW , HOFMANN FRANZ , HOENLEIN WOLFGANG , KRETZ JOHANNES , KREUPL FRANZ , LANDGRAF ERHARD , LUYKEN RICHARD JOHANNES , ROESNER WOLFGANG , SCHULZ THOMAS , SPECHT MICHAEL
Inventor： GRAHAM ANDREW , HOFMANN FRANZ , HOENLEIN WOLFGANG , KRETZ JOHANNES , KREUPL FRANZ , LANDGRAF ERHARD , LUYKEN RICHARD JOHANNES , ROESNER WOLFGANG , SCHULZ THOMAS , SPECHT MICHAEL
IPC: G11C13/02 , H01L21/8242 , H01L27/108 , H01L51/00 , H01L51/05 , H01L51/30 , H01L21/8239 , H01L51/20
CPC classification number: G11C13/025 , B82Y10/00 , G11C13/0033 , G11C2213/16 , H01L27/10841 , H01L27/10864 , H01L27/10876 , H01L27/283 , H01L51/0048 , H01L51/0052 , H01L51/0512 , H01L51/057
Abstract: The invention relates to a memory cell, memory cell arrangement, structuring arrangement and method for production of a memory cell. The memory cell has a vertical gate transistor and a memory capacitor, whereby the vertical gate transistor comprises a semiconducting nanostructure, grown on at least part of the memory capacitor.
Abstract translation: 本发明涉及一种存储器单元，存储器单元阵列，纹理化装置和一种用于制造存储器单元的方法。 该存储单元有一个垂直的开关晶体管和存储电容器，所述具有半导体纳米结构垂直开关晶体管上生长至少存储电容器的一部分。
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公开(公告)号：WO02092505A3
公开(公告)日：2003-02-27
申请号：PCT/EP0205433
申请日：2002-05-16
Applicant: INFINEON TECHNOLOGIES AG , GRAHAM ANDREW , HOFMANN FRANZ , KRETZ JOHANNES , KREUPL FRANZ , LUYKEN RICHARD JOHANNES , ROESNER WOLFGANG
Inventor： GRAHAM ANDREW , HOFMANN FRANZ , KRETZ JOHANNES , KREUPL FRANZ , LUYKEN RICHARD JOHANNES , ROESNER WOLFGANG
CPC classification number: H01L51/0048 , B82Y10/00 , C01B32/05 , G01N27/127 , G11C13/025 , H01L51/0595
Abstract: The invention relates to a nanotube array, comprising a substrate, a catalyst layer having one or more partial areas on the surface of the substrate and at least one nanotube parallel to the surface of the substrate on the surface of the catalyst layer. The nanotube array also has an electrically insulating layer between the substrate and the nanotubes and a topography such that the end segments of the at least one nanotube rest on the electrically insulating layer while its central segment rests freely. The invention also relates to a method for the production of said nanotube array.
Abstract translation: 本发明涉及一种纳米管装置，其包括催化剂层布置的纳米管的表面上的衬底，包括一个或多个子区域的催化剂层，在衬底的表面上和至少一个平行于衬底的表面上。 纳米管组件还包括基板，并且具有使得所述至少一个纳米管搁在其端部上的电绝缘层上，并在其中间部分露出的形貌纳米管之间的电绝缘层。 本发明还涉及一种用于制造纳米管阵列。
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公开(公告)号：DE102004031127A1
公开(公告)日：2006-01-19
申请号：DE102004031127
申请日：2004-06-28
Applicant: INFINEON TECHNOLOGIES AG
Inventor： GRAHAM ANDREW , STEINLESBERGER GERNOT
Abstract: A biosensor has a substrate with a surface incorporating one or more electrodes under a carbon cover incorporating a trap module. The sensor forms part of a diagnostic electronic circuit determining the electrode capacity. The carbon layer is primarily diamond that insulates and renders the electrode passive. The carbon layer structure forms no electrical link between the electrodes. The electrodes are fabricated of electrically-conducting carbon. Also claimed is a manufacturing process for the sensor in a hydrogen atmosphere pressurised to between 1 and 4 hectopascals and at a temperature of between 600 and 1000[deg]C, and in the presence of a hydrocarbon gas, oxygen plasma and/or acid.
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公开(公告)号：DE10344814B3
公开(公告)日：2005-07-14
申请号：DE10344814
申请日：2003-09-26
Applicant: INFINEON TECHNOLOGIES AG
Inventor： GRAHAM ANDREW , KREUPL FRANZ , DUESBERG GEORG
IPC: G11C13/02 , H01L21/02 , H01L21/8242 , H01L27/108 , H01L51/00 , H01L51/30 , G11C11/40 , H01L27/08 , H01L21/822 , B82B1/00 , B82B3/00
Abstract: The present device relates to memory devices for storing electric charge having memory cells and transistors arranged spatially next to them, and relates in particular to memory devices having memory cells with a high capacitance. In the memory cells which form a memory device to which the invention relates, there is a substrate and at least one memory cell which is arranged on the substrate and includes a first electrode element, which is electrically connected to the substrate, an insulation layer, which has been applied to the first electrode element, and a second electrode element, which has been applied to the insulation layer and is electrically insulated from the first electrode element.
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Patent Agency Ranking
公开(公告)号：DE10252607B4
公开(公告)日：2005-01-27
申请号：DE10252607
申请日：2002-11-12
Applicant: INFINEON TECHNOLOGIES AG
Inventor： UNGER EUGEN , DUESBERG GEORG STEFAN , GRAHAM ANDREW , LIEBAU MAIK
Abstract: Production of a nano-element arrangement comprises partially covering a first nano-element with a catalyst material to catalyze the growth of the nano-elements, and growing a second nano-element on the catalyst material. An Independent claim is also included for a nano-element arrangement produced by the above process.
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公开(公告)号：DE10252607A1
公开(公告)日：2004-06-03
申请号：DE10252607
申请日：2002-11-12
Applicant: INFINEON TECHNOLOGIES AG
Inventor： UNGER EUGEN , DUESBERG GEORG STEFAN , GRAHAM ANDREW , LIEBAU MAIK
Abstract: Production of a nano-element arrangement comprises partially covering a first nano-element with a catalyst material to catalyze the growth of the nano-elements, and growing a second nano-element on the catalyst material. An Independent claim is also included for a nano-element arrangement produced by the above process.
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公开(公告)号：DE10123876A1
公开(公告)日：2002-11-28
申请号：DE10123876
申请日：2001-05-16
Applicant: INFINEON TECHNOLOGIES AG
Inventor： LUYKEN JOHANNES R , HOFMANN FRANZ , ROESNER WOLFGANG , KRETZ JOHANNES , KREUPL FRANZ , GRAHAM ANDREW
Abstract: Nanotube array comprises a substrate; a catalyst layer having partial regions on the surface of the substrate; nanotubes (205) arranged on the surface of the catalyst layer parallel to the surface of the substrate; and pores arranged parallel to the surface of the substrate. An Independent claim is also included for a process for the production of the nanotube array. Preferred Features: The array has an electrically insulating layer (202) between the substrate and the catalyst layer. The partial regions of the catalyst layer are decoupled from each other. The array also has a switching circuit arrangement by which the nanotubes can be controlled and/or read.
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公开(公告)号：DE10113549A1
公开(公告)日：2002-10-02
申请号：DE10113549
申请日：2001-03-20
Applicant: INFINEON TECHNOLOGIES AG
Inventor： UNGER EUGEN , KREUPL FRANZ , GRAHAM ANDREW
Abstract: Process for growing nanotubes comprises contacting a substrate (100) having a region (107) covered with a photolacquer (101) and a free region (106) with a compound of a catalytically active metal to form a layer on the substrate; contacting the treated substrate with a basic solution so that the catalytically active metal compound is converted into the corresponding hydroxide of the metal; removing the photolacquer so that the hydroxide remains on the free region of the substrate; reducing the hydroxide to the corresponding metal; and growing nanotubes on the metal. Preferred Features: Iron is used as the catalytically active metal. The catalytically active metal compound is FeCl3 or a solution iron salt. The basic solution is a solution of NH3 having a concentration of 5%. The photolacquer is removed with acetone under the action of ultrasound and rinsing with isopropanol.
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公开(公告)号：DE50214710D1
公开(公告)日：2010-11-25
申请号：DE50214710
申请日：2002-05-16
Applicant: INFINEON TECHNOLOGIES AG
Inventor： GRAHAM ANDREW , HOFMANN FRANZ , KRETZ JOHANNES , KREUPL FRANZ , LUYKEN RICHARD JOHANNES , ROESNER WOLFGANG
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