公开(公告)号：US09439292B1

公开(公告)日：2016-09-06

申请号：US14641016

申请日：2015-03-06

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Yi-Fan Kao ,  Jaen-Don Lan ,  Yung-Lin Chia ,  An-Ping Tseng

IPC: H05K1/18 ,  H05K3/06 ,  H05K3/00

CPC classification number: H05K3/064 ,  H01L23/5389 ,  H05K1/185 ,  H05K1/188 ,  H05K3/0008 ,  H05K3/108 ,  H05K3/305 ,  H05K3/425 ,  H05K2201/09563 ,  H05K2201/10674 ,  H05K2203/166

Abstract: A method for manufacturing a circuit board with a buried element having high density pin count, wherein a micro copper window formed in a first circuit by patterned dry film electroplating is easily controlled less than 50 μm so that the micro conduction holes formed after the laser drilling each has a diameter greatly shrunk less than 50 μm so as to highly increase density of the micro conduction holes, thereby facilitating in burial of the buried element with the high density pin count. Additionally, by disposing the micro conduction holes in the same elevation, optically aligning a fixing position for the buried element can be controlled precisely.

Abstract translation: 一种制造具有高密度引脚数的埋入元件的电路板的方法，其中通过图案化干电镀电镀形成在第一电路中的微铜窗容易控制在小于50μm，从而在激光钻孔之后形成的微导电孔 每个具有大大缩小到小于50μm的直径，从而高度增加微通孔的密度，从而便于以高密度引脚数掩埋埋入元件。 此外，通过将相同高度的微通孔设置在一起，可精确地控制掩埋元件的固定位置的光学对准。

公开(公告)号：US09301405B1

公开(公告)日：2016-03-29

申请号：US14604956

申请日：2015-01-26

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Yi-Fan Kao ,  Jaen-Don Lan ,  Yu-Te Lu ,  Yung-Lin Chia ,  An-Ping Tseng

IPC: H01L21/4763 ,  H05K3/40 ,  H05K3/06 ,  H05K3/00 ,  H05K3/18 ,  H05K3/02 ,  H05K1/09 ,  H05K1/11 ,  H01L21/48

CPC classification number: H05K3/0035 ,  H01L21/4857 ,  H01L2924/01078 ,  H01L2924/014 ,  H05K1/115 ,  H05K3/007 ,  H05K3/064 ,  H05K3/421 ,  H05K3/429 ,  H05K2201/09536

Abstract: A method for manufacturing microthrough-hole includes electroplating a metal layer on a carrier plate, patterning the metal layer to form a first circuit having copper pads, covering the first circuit with a photoresist layer and not covering the copper window between two of the copper pads, etching the metal layer beneath the copper window and removing the photoresist layer, sequentially forming an insulation layer and a second circuit on the first circuit and the copper window, the second circuit layer having a stop pad corresponding to the copper window, removing the carrier plate, upward drilling through the insulation layer between the stop pad and the copper window to form a microthrough-hole beneath the stop pad, and forming a conductive layer in the microthrough-hole to form the microthrough-hole connecting the first and second circuits. The microthrough-hole and its occupied area is greatly reduced, thereby achieving high circuit density.

Abstract translation: 一种用于制造微通孔的方法包括在载体板上电镀金属层，图案化金属层以形成具有铜焊盘的第一电路，用光致抗蚀剂层覆盖第一电路，并且不覆盖两个铜焊盘之间的铜窗 蚀刻铜窗下方的金属层并除去光致抗蚀剂层，在第一电路和铜窗上依次形成绝缘层和第二电路，第二电路层具有对应于铜窗的停止焊盘，移除载体 通过止动垫和铜窗之间的绝缘层向上钻孔，以在止动垫下方形成微通孔，并在微通孔中形成导电层，形成连接第一和第二电路的微通孔。 微通孔及其占用面积大大降低，从而实现高电路密度。

公开(公告)号：US09831167B1

公开(公告)日：2017-11-28

申请号：US15678130

申请日：2017-08-16

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Yi-Fan Kao ,  Shuo-Hsun Chang ,  Yu-Te Lu ,  Kuo-Chun Huang

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/13 ,  H01L23/00 ,  H01L21/56 ,  H01L23/538 ,  H01L21/48 ,  H01L23/367

CPC classification number: H01L23/49833 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/565 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/367 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/16 ,  H01L24/81 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/15787 ,  H01L2924/18161 ,  H01L2924/3511 ,  H05K1/0206 ,  H05K1/0271 ,  H05K1/183 ,  H05K3/4697 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2203/061 ,  H01L2924/00

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate with an opening bonded to a carrier board in order to form a compound carrier board structure. A die is placed in the opening and bonded to the carrier board. A sealant is filled in a gap between surrounding walls of the opening and the die at a height lower than the die to fixedly place the die within the opening and to leave a non-active surface of the die exposed.

公开(公告)号：US09754870B2

公开(公告)日：2017-09-05

申请号：US15071368

申请日：2016-03-16

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Yi-Fan Kao ,  Shuo-Hsun Chang ,  Yu-Te Lu ,  Kuo-Chun Huang

IPC: H01L23/498 ,  H01L23/31 ,  H05K3/46 ,  H01L23/00 ,  H01L25/10 ,  H05K1/02 ,  H05K1/18

CPC classification number: H01L23/49833 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/565 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/367 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/16 ,  H01L24/81 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/15787 ,  H01L2924/18161 ,  H01L2924/3511 ,  H05K1/0206 ,  H05K1/0271 ,  H05K1/183 ,  H05K3/4697 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2203/061 ,  H01L2924/00

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate with a penetrating rectangular opening bonded to a non-conductive film then a carrier board in order to form a compound carrier board structure. The baseplate is constructed with a low Thermal Expansion Coefficient material.

公开(公告)号：US20160262267A1

公开(公告)日：2016-09-08

申请号：US14641016

申请日：2015-03-06

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Yi-Fan Kao ,  Jaen-Don Lan ,  Yung-Lin Chia ,  An-Ping Tseng

IPC: H05K3/06 ,  H05K3/00 ,  H05K1/18

CPC classification number: H05K3/064 ,  H01L23/5389 ,  H05K1/185 ,  H05K1/188 ,  H05K3/0008 ,  H05K3/108 ,  H05K3/305 ,  H05K3/425 ,  H05K2201/09563 ,  H05K2201/10674 ,  H05K2203/166

Abstract: A method for manufacturing a circuit board with a buried element having high density pin count, wherein a micro copper window formed in a first circuit by patterned dry film electroplating is easily controlled less than 50 μm so that the micro conduction holes formed after the laser drilling each has a diameter greatly shrunk less than 50 μm so as to highly increase density of the micro conduction holes, thereby facilitating in burial of the buried element with the high density pin count. Additionally, by disposing the micro conduction holes in the same elevation, optically aligning a fixing position for the buried element can be controlled precisely.

Abstract translation: 一种制造具有高密度引脚数的埋入元件的电路板的方法，其中通过图案化干电镀电镀形成在第一电路中的微铜窗容易控制在小于50μm，从而在激光钻孔之后形成的微导电孔 每个具有大大缩小到小于50μm的直径，从而高度增加微通孔的密度，从而便于以高密度引脚数掩埋埋入元件。 此外，通过将相同高度的微通孔设置在一起，可精确地控制掩埋元件的固定位置的光学对准。

公开(公告)号：US09406641B2

公开(公告)日：2016-08-02

申请号：US13938335

申请日：2013-07-10

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Yi-Fan Kao ,  Shuo-Hsun Chang ,  Yu-Te Lu ,  Kuo-Chun Huang

IPC: H01L23/00 ,  H01L23/31 ,  H05K3/46 ,  H01L23/498 ,  H05K1/02 ,  H05K1/18 ,  H01L25/10

CPC classification number: H01L24/81 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/562 ,  H01L24/16 ,  H01L25/105 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/18161 ,  H01L2924/3511 ,  H05K1/0206 ,  H05K1/0271 ,  H05K1/183 ,  H05K3/4697 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2203/061 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate having a flip region with a through-opening and bonding to a Non-conductive Film to bond to a carrier board in order to form a compound carrier board structure. The baseplate is constructed with a low Thermal Expansion Coefficient material.

Abstract translation: Flip-Chip Chip-Scale封装的复合载体板结构及其制造方法提供了一种具有通孔的翻转区和与非导电膜结合以结合到载体板以形成化合物载体的底板 板结构。 底板由低热膨胀系数材料构成。