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公开(公告)号:JP2001189091A
公开(公告)日:2001-07-10
申请号:JP2000323380
申请日:2000-10-23
Applicant: ST MICROELECTRONICS SA
Inventor: CHEHADI MOHAMAD
Abstract: PROBLEM TO BE SOLVED: To generate high voltage with less energy in a power source receiving electric power by radio. SOLUTION: An integrated circuit card is provided with voltage regulators 210, 230 receiving electric power with a form of a radio frequency signal SR and generating first power source voltage Vcc, and with a voltage booster circuit 232 receiving first power source voltage Vcc by a first power source input terminal 231, receiving second power source voltage being higher than the first power source voltage Vcc by a second power source input terminal 232, and generating high voltage HV.
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公开(公告)号:DE69815258D1
公开(公告)日:2003-07-10
申请号:DE69815258
申请日:1998-10-21
Applicant: ST MICROELECTRONICS SA
Inventor: MANI CHRISTOPHE , CHEHADI MOHAMAD
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公开(公告)号:FR2800214B1
公开(公告)日:2001-12-28
申请号:FR9913391
申请日:1999-10-22
Applicant: ST MICROELECTRONICS SA
Inventor: CHEHADI MOHAMAD
Abstract: An integrated circuit card receives power in the form of a radio frequency signal and includes a voltage generator that produces a first power supply voltage. The card also includes a voltage booster circuit for producing a high voltage that receives the first power supply voltage at a first supply input terminal. The voltage booster circuit also receives a second power supply voltage higher than the first power supply voltage at a second supply input terminal.
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公开(公告)号:DE60032439T2
公开(公告)日:2007-10-11
申请号:DE60032439
申请日:2000-09-15
Applicant: ST MICROELECTRONICS SA
Inventor: CHEHADI MOHAMAD
Abstract: An integrated circuit card receives power in the form of a radio frequency signal and includes a voltage generator that produces a first power supply voltage. The card also includes a voltage booster circuit for producing a high voltage that receives the first power supply voltage at a first supply input terminal. The voltage booster circuit also receives a second power supply voltage higher than the first power supply voltage at a second supply input terminal.
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公开(公告)号:DE60032439D1
公开(公告)日:2007-02-01
申请号:DE60032439
申请日:2000-09-15
Applicant: ST MICROELECTRONICS SA
Inventor: CHEHADI MOHAMAD
Abstract: An integrated circuit card receives power in the form of a radio frequency signal and includes a voltage generator that produces a first power supply voltage. The card also includes a voltage booster circuit for producing a high voltage that receives the first power supply voltage at a first supply input terminal. The voltage booster circuit also receives a second power supply voltage higher than the first power supply voltage at a second supply input terminal.
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公开(公告)号:FR2821974A1
公开(公告)日:2002-09-13
申请号:FR0103284
申请日:2001-03-12
Applicant: ST MICROELECTRONICS SA
Inventor: NAURA DAVID , BERTRAND BERTRAND , CHEHADI MOHAMAD
Abstract: A circuit produces a voltage for the erasure or programming of a memory cell. The circuit includes a capacitor, and a discharge circuit connected to a first terminal of the capacitor. The discharge circuit includes a first transistor, a drain of which is connected to the first terminal of the capacitor. The first transistor activates the discharge circuit when a discharge signal is received by a gate of the first transistor. The discharge circuit includes a slow discharge arm and a fast discharge arm parallel-connected to the source of the first transistor. The discharge circuit produces a low discharge current or a high discharge current for discharging the capacitor as a function of an operating mode selection signal.
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公开(公告)号:FR2795881B1
公开(公告)日:2001-08-31
申请号:FR9908663
申请日:1999-06-30
Applicant: ST MICROELECTRONICS SA
Inventor: DEVIN JEAN , CHEHADI MOHAMAD
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公开(公告)号:FR2798769B1
公开(公告)日:2004-03-12
申请号:FR9911858
申请日:1999-09-20
Applicant: ST MICROELECTRONICS SA
Inventor: CHEHADI MOHAMAD
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公开(公告)号:FR2822286A1
公开(公告)日:2002-09-20
申请号:FR0103659
申请日:2001-03-19
Applicant: ST MICROELECTRONICS SA
Inventor: BERTRAND BERTRAND , CHEHADI MOHAMAD , NAURA DAVID
Abstract: The electrically programmable erasable memory has cells (CEij) connected to word lines (WLi) and bit lines (BLj) arranged in columns (COLk). There is a selection column lock (LSCIk). Each lock column selected has a unit delivering a detection of a grid control signal, a signal selecting bit lines, as a function of the output locking element during the phases of programming and read oF the memory cells.
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公开(公告)号:FR2795881A1
公开(公告)日:2001-01-05
申请号:FR9908663
申请日:1999-06-30
Applicant: ST MICROELECTRONICS SA
Inventor: DEVIN JEAN , CHEHADI MOHAMAD
IPC: G11C16/06 , G05F1/00 , G06K19/07 , G11C16/12 , G11C16/30 , H02M3/155 , H02M3/08 , G11C5/14 , H04B5/00
Abstract: The invention concerns an integrated circuit comprising a detection circuit (10) and a rectifier circuit (20) associated in series, to supply a rectified voltage (HV1, HV1), and a low voltage regulating circuit (30, 34) which receives the rectified voltage (HV1) and supplies a low voltage (Vcc). The invention is characterised in that the circuit further comprises a voltage producing circuit (100) which receives the rectified voltage (HV1) and produces high voltage (HT) different from the low voltage (Vcc). In one embodiment, the circuit also includes a memory (40) comprising a memory plane (42), the memory plane receiving the low voltage (Vcc) and the high voltage (HT).
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