公开(公告)号：JPH03150612A

公开(公告)日：1991-06-27

申请号：JP28455090

申请日：1990-10-24

Applicant: ST MICROELECTRONICS SRL

Inventor： PALARA SERGIO ,  PAPARO MARIO ,  PELLICANO' ROBERTO

IPC: G05F1/10 ,  G05F1/56 ,  G05F3/22 ,  H01F7/18 ,  H03K17/16 ,  H03K17/615

Abstract: PURPOSE: To prevent a parasitic component from being triggered by supplying a current to the load so as to maintain the output voltage at a value almost equal to a reference voltage when the output voltage becomes lower than the reference voltage. CONSTITUTION: This circuit is provided with a comparator B for comparing the output voltage Vc with the predetermined reference voltage Vcif. Then, in the case that the output voltage Vc becomes lower than the reference voltage Vcif, the current is supplied to the load so as to maintain the output voltage at the value almost equal to the reference voltage Vcif. In such a manner, a negative voltage peak in the collector of a power unit is evaded and the operation of the control circuit is guaranteed. Thus, the parasitic component is prevented from being triggered.

公开(公告)号：JP2745433B2

公开(公告)日：1998-04-28

申请号：JP28455090

申请日：1990-10-24

Applicant: ST MICROELECTRONICS SRL

Inventor： PALARA SERGIO ,  PAPARO MARIO ,  PELLICANO' ROBERTO

IPC: G05F1/10 ,  G05F1/56 ,  G05F3/22 ,  H01F7/18 ,  H03K17/16 ,  H03K17/615

公开(公告)号：JPH05226597A

公开(公告)日：1993-09-03

申请号：JP31502492

申请日：1992-11-25

Applicant: ST MICROELECTRONICS SRL ,  CONS RIC MICROELETTRONICA

Inventor： PAPARO MARIO ,  AIELLO NATALE

IPC: H01L21/8238 ,  H01L21/761 ,  H01L27/088 ,  H01L27/092 ,  H01L29/78 ,  H02M7/219

Abstract: PURPOSE: To provide a large-current MOS transistor integrated bridge which is formed in a monolithic structure on a single Si substrate, optimizing a conduction power loss. CONSTITUTION: An N -type substrate 3, which includes at least two arms respectively comprised of first and second MOS Trs and which forms a positive potential output terminal K1, covered with an N -type epitaxial layer 4. A bridge is comprised of a P and P -type insulating regions 13, 25 and 14, 16, including N -type drain regions 15, 16, N-type drain regions 19, 20 and a pair of N -type source regions 23, 24 forming continuously P-type main body regions 21, 22 and a negative potential output terminal with respect to each of the first Tr. The bridge also consists of an N -type drain regions 5, 6, including N-type drain regions 31, 32 with respect to each of the second Tr, continuously P-type main body regions 9, 10 and a pair of N -type regions 11, 12 forming respectively corresponding ac inputs A3, A4.

公开(公告)号：JPH05252006A

公开(公告)日：1993-09-28

申请号：JP19823192

申请日：1992-07-24

Applicant: CONS RIC MICROELETTRONICA ,  ST MICROELECTRONICS SRL

Inventor： ZISA MICHELE ,  BELLUSO MASSIMILIANO ,  PAPARO MARIO

IPC: H03F3/217 ,  H03K4/58 ,  H03K5/02 ,  H03K17/06 ,  H03K17/687 ,  H03K19/017

Abstract: PURPOSE: To actualize the bootstrap circuit which drives a power MOS transistor(TR) with high-potential side constitution wherein the power MOS TR is able to operate with a low-level supply voltage when operating at a high switching frequency. CONSTITUTION: The bootstrap circuit for the power MOS TR of the high- potential side driving constitution includes a 1st capacitor C1 which can be charged to a 1st voltage level of the supply voltage of the power TR T1. A 2nd capacitor C2 is provided in combination with the 1st capacitor C1 so that a 1st voltage and a 2nd voltage higher than the threshold voltage of the power TR T1 can be used.

公开(公告)号：DE69128936T2

公开(公告)日：1998-07-16

申请号：DE69128936

申请日：1991-11-25

Applicant: ST MICROELECTRONICS SRL ,  CONS RIC MICROELETTRONICA

Inventor： PAPARO MARIO ,  AIELLO NATALE

IPC: H01L21/8238 ,  H01L21/761 ,  H01L27/088 ,  H01L27/092 ,  H01L29/78 ,  H02M7/219 ,  H01L21/76

Abstract: The structure comprises at least arms (1, 2) each formed from a first and a second MOS transistor (M3, M1; M4, M2). Its integrated monolithic construction provides for a type N++ substrate (3) forming a positive potential output terminal (K1) which is overlaid by a type N-epitaxial layer (4). For each of the first transistors (M3; M4) this comprises a type P, P+ insulating region (13, 25; 14, 26) containing a type N+ enriched drain region (15; 16), a type N drain region (19; 20) and, in succession, a type P body region (21; 22) and a pair of type N+ source regions (23; 24) forming a negative potential output terminal (A1) respectively. For each of the second transistors (M1, M2) the structure comprises a type N+ enriched drain region (5, 6) containing a type N drain region (31, 32) and in succession a type P body region (9; 10) and a pair of type N+ regions (11; 12) forming corresponding alternating current inputs (A3, A4) respectively.

公开(公告)号：DE69032552D1

公开(公告)日：1998-09-17

申请号：DE69032552

申请日：1990-10-18

Applicant: ST MICROELECTRONICS SRL

Inventor： PALARA SERGIO ,  PAPARO MARIO ,  PELLICANO' ROBERTO

IPC: G05F1/56 ,  G05F3/22 ,  G05F1/10 ,  H01F7/18 ,  H03K17/16 ,  H03K17/615

Abstract: The limiting circuit comprises a comparator (B), which makes the comparison between the output voltage (Vc) of the power device (T5, T6) and a predetermined reference voltage (Vrif). In the case wherein the output voltage (Vc) is just below the reference voltage (Vrif) the comparator (B) supplies a current to the load (L) suitable for preventing the output voltage from falling further below said reference voltage (Vrif).

公开(公告)号：IT1236627B

公开(公告)日：1993-03-25

申请号：IT2210489

申请日：1989-10-24

Applicant: ST MICROELECTRONICS SRL

Inventor： PALARA SERGIO ,  PAPARO MARIO ,  PELLICANO' ROBERTO

IPC: G05F1/56 ,  G05F3/22 ,  G05F1/10 ,  H01F7/18 ,  H03K17/16 ,  H03K17/615 ,  H02H ,  H01L

Abstract: The limiting circuit comprises a comparator (B), which makes the comparison between the output voltage (Vc) of the power device (T5, T6) and a predetermined reference voltage (Vrif). In the case wherein the output voltage (Vc) is just below the reference voltage (Vrif) the comparator (B) supplies a current to the load (L) suitable for preventing the output voltage from falling further below said reference voltage (Vrif).

公开(公告)号：ITMI20111896A1

公开(公告)日：2013-04-20

申请号：ITMI20111896

申请日：2011-10-19

Applicant: ST MICROELECTRONICS SRL

Inventor： PAPARO MARIO ,  PATTI DAVIDE GIUSEPPE ,  ROSSI DOMENICO

公开(公告)号：DE69128936D1

公开(公告)日：1998-03-26

申请号：DE69128936

申请日：1991-11-25

Applicant: ST MICROELECTRONICS SRL ,  CONS RIC MICROELETTRONICA

Inventor： PAPARO MARIO ,  AIELLO NATALE

IPC: H01L21/8238 ,  H01L21/761 ,  H01L27/088 ,  H01L27/092 ,  H01L29/78 ,  H02M7/219 ,  H01L21/76

Abstract: The structure comprises at least arms (1, 2) each formed from a first and a second MOS transistor (M3, M1; M4, M2). Its integrated monolithic construction provides for a type N++ substrate (3) forming a positive potential output terminal (K1) which is overlaid by a type N-epitaxial layer (4). For each of the first transistors (M3; M4) this comprises a type P, P+ insulating region (13, 25; 14, 26) containing a type N+ enriched drain region (15; 16), a type N drain region (19; 20) and, in succession, a type P body region (21; 22) and a pair of type N+ source regions (23; 24) forming a negative potential output terminal (A1) respectively. For each of the second transistors (M1, M2) the structure comprises a type N+ enriched drain region (5, 6) containing a type N drain region (31, 32) and in succession a type P body region (9; 10) and a pair of type N+ regions (11; 12) forming corresponding alternating current inputs (A3, A4) respectively.

公开(公告)号：DE102014005866A1

公开(公告)日：2014-11-13

申请号：DE102014005866

申请日：2014-04-23

Applicant: ST MICROELECTRONICS SRL

Inventor： PATTI DAVIDE GIUSEPPE ,  PAPARO MARIO

IPC: F02P17/00

Abstract: Der Druck in dem Brennraum eines elektronisch gesteuerten Motors mit Zündkerzenzündung kann ohne spezielle Sensoren im Echtzeitmodus geschätzt werden, indem erfasste Ionisationsstromdaten verarbeitet werden, um Merkmale der Stromwellenform zu berechnen, die nachgewiesenerweise mit dem Druck innerhalb des Motorzylinders korrelieren, und diese auf der Grundlage einer Nachschlagetabelle von zeitinvarianten Korrelationskoeffizienten, die durch eine Kalibrierungskampagne von Tests an einem gezielt mit Sensoren ausrüsteteten Testmotor erzeugt werden, in Korrelation zu setzen. Ein mathematisches Modell des elektrischen und physischen Zündkerzenzündungssystems und des Brennraums des Motors wird während der Kalibrierung durch wiederholtes Testen der interaktiven Leistung von Korrelationskoeffizienten von zugehörigen Termen eines mathematischen Ausdrucks des Modells und Vergleichen des ausgedrückten Druckwerts mit dem tatsächlichen Druckwert, wie von einem Sensor gemessen, verfeinert. Die erzeugte Nachschlagetabelle und das verfeinerte Modell sind in ein fahrzeugeigenes System eingebettet, das den Ionisationsstrom in dem laufenden Motor erfasst, mindestens eines oder mehrere wesentliche Merkmale der Wellenform des erfassten Ionisationsstroms misst oder berechnet und einen oder mehrere der gemessenen oder berechneten Merkmalswerte zusammen mit der Matrix von zeitinvarianten Koeffizienten und mit einem Satz von tatsächlichen Werten der Parameter außer dem Druck und/oder der Steuereinstellungen des laufenden Motors verarbeitet, um einen ausgewerteten Wert des Brennraumdrucks zu erzeugen. Ausführungsformen des Kalibrierungsprozesses und von Echtzeiterfassung von Ionenstromdaten, analoges Filtern, A/D-Umwandlung und Schätzung des Drucks (CCP) sind offenbart.