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公开(公告)号：JPH07263982A
公开(公告)日：1995-10-13
申请号：JP24959994
申请日：1994-10-14
Applicant: ST MICROELECTRONICS SRL
Inventor： CORDINI PAOLO , PEDRAZZINI GIORGIO , ROSSI DOMENICO
IPC: H03K19/018 , G06J1/00 , H03F3/62 , H03F3/68
Abstract: PURPOSE: To obtain an effective interface by providing an integrated circuit which operates with a low-voltage and a high-voltage input signal and outputs a high-voltage or low-voltage signal corresponding to them. CONSTITUTION: Cutoff circuit block 4 inhibits a 1st amplifying circuit block 2 from becoming conductive when a high-voltage output terminal operates as an input terminal. Consequently, any high-voltage signal applied to the high- voltage output terminal B operates on only a 2nd amplification block 3. A 2nd amplifying circuit block 3, on the other hand, consists of a power element which operates with a high voltage, withstands high-voltage input, and outputs a low-voltage signal. For the application of this interface circuit 1 to an industrial control unit, the 1st amplifying circuit block 2 operates relatively to an actuator, but the 2nd amplifying circuit block 3 operates relatively to a microcontroller. This block 2 can be powered directly by the same power source with the actuator and the block 3 can share a low-voltage power source with the microcontroller.
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公开(公告)号：JPH0833323A
公开(公告)日：1996-02-02
申请号：JP32147194
申请日：1994-11-29
Applicant: ST MICROELECTRONICS SRL
Inventor： ROSSI DOMENICO , TANAKA KAZUYUKI
Abstract: PURPOSE: To provide a boost converter which suitably drives the capacitive load direct and is easily miniaturized with a simple circuit. CONSTITUTION: One terminal of an inductor L, which is connected to a supply rail VDD through a 1st switch SWA, is connected to an output node VOUT to which a capacitive load C is connected through a 1st discharge path (SWC+D1) and the other terminal of the inductor, which is grounded through a 2nd switch SWB is connected to the output node through a 2nd discharge path (SWD+D2).
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公开(公告)号：JPH07176004A
公开(公告)日：1995-07-14
申请号：JP40507490
申请日：1990-12-21
Applicant: ST MICROELECTRONICS SRL
Inventor： MURARI BRUNO , ROSSI DOMENICO , SAVINO PIERANTONIO
Abstract: PURPOSE: To provide a preamplifier capable of being directly connected to a magnetic head and eliminating the need of the presence of especially a reference voltage source different from a power supply voltage or the capacitor having a high value. CONSTITUTION: Differential circuits T5 and T6 provided with an input stage provided with the differential circuit and a transistor output stage T2 are provided. A differential stage is provided with an intrinsic offset voltage and can be grounded and directly connected to the magnetic head L. Transistors T5 and T6 form the differential circuit provided with a different bias current so as to reduce input equivalent noise. The magnetic head L is connected to the base terminal of the transistor T5 and the base terminal of the transistor T6 is connected to the intermediate point of a pair of resistors R1 and R2 serially connected with each other between the output stage T2 and the line of a reference voltage. In the form, the differential stages T5 and T6 bias output by the offset voltage without the need of additional components for the purpose.
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公开(公告)号：JPH08190438A
公开(公告)日：1996-07-23
申请号：JP33451094
申请日：1994-12-19
Applicant: ST MICROELECTRONICS SRL
Inventor： RICOTTI GIULIO , ROSSI DOMENICO
Abstract: PURPOSE: To provide a relatively easily realizable circuit capable of generating the reference voltage of the relatively low value of the order of several tens mV without heat drift. CONSTITUTION: A difference between the base-emitter joining voltages of two different transistors Q6 and Q7 and the preset fraction of the base-emitter joining voltage are totalized. The circuit for performing the function is provided with a first circuit capable of generating a first voltage V1 equal to the fraction of a base-emitter voltage, an operational amplifier capable of generating a total voltage in an output node and a means for controlling a bias current through an input transistor pair.
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5.发明专利
公开(公告)号：JPH07142969A
公开(公告)日：1995-06-02
申请号：JP9528794
申请日：1994-05-09
Applicant: ST MICROELECTRONICS SRL
Inventor： ROSSI DOMENICO , TATEOKA MASAYUKI
IPC: G01R19/165 , H03K3/0233 , H03K5/08
Abstract: PURPOSE: To overcome defects of a conventional technology and to extend a dynamic range of a common mode input voltage. CONSTITUTION: A couple of variable current sources A1 , A2 and A3 , A4 are provided respectively in a 1st differential cell 2 consisting of a couple of npn bipolar transistors TRs T1 , T2 and a 2nd differential cell 5 consisting of a couple of pnp bipolar TRs T8 , T9 .
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Patent Agency Ranking
公开(公告)号：JPH07336998A
公开(公告)日：1995-12-22
申请号：JP15839195
申请日：1995-05-31
Applicant: ST MICROELECTRONICS SRL
Inventor： ROSSI DOMENICO , TAHARA HISASHI
IPC: H01L27/04 , H01L21/822 , H01L29/78 , H01L29/92 , H02M3/07
Abstract: PURPOSE: To obtain an output voltage that is close that double that of an input voltage by providing a bipolar part for securing switching, even at a low input voltage and a CMOS part for reducing a voltage drop through the bipolar element. CONSTITUTION: A first field effect transistor M1 is connected in parallel with a bipolar transistor T3 for constituting a switch that is directed toward the ground of a charge transfer capacitor C1, and a second field effect transistor M2 is connected in parallel with a charging diode T7 of an output capacitor C2. Then, a pair of CMOSs are driven by a clock signal CK, that passes through a level-shift bipolar transistor T2 where a power is supplied by a voltage, that exists at an output node VOUT of a charge pump circuit and a succeeding inversion stage I2.
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公开(公告)号：JPH07255167A
公开(公告)日：1995-10-03
申请号：JP31904494
申请日：1994-11-29
Applicant: ST MICROELECTRONICS SRL
Inventor： ROSSI DOMENICO , TANAKA KAZUYUKI
Abstract: PURPOSE: To provide a boost converter suitable for driving a capacitive load directly with a relatively high voltage and which can be miniaturized easily through a simple circuit. CONSTITUTION: An inductor connected through a first switch SWA with a supply rail VDD has one terminal connected through a first discharge path (SWC+D1) with a capacitive load C and the inductor grounded through a second switch SWB has the other terminal connected through a second discharge path (SWC+D2) with an output node.
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公开(公告)号：JPH07319565A
公开(公告)日：1995-12-08
申请号：JP13588595
申请日：1995-05-08
Applicant: ST MICROELECTRONICS SRL
Inventor： PEDRAZZINI GIORGIO , SCROCCHI GIUSEPPE , CORDINI PAOLO , ROSSI DOMENICO
Abstract: PURPOSE: To provide a PWM control circuit for operating current mode control in a complete digital mode without necessitating the usage of any error amplifier, or excessively complicating the circuit. CONSTITUTION: This circuit includes first and second comparators COMP 1 and 2 for a sense resistance RSENSE, and a bi-directional stable logic circuit FFD 2 driven by the output of the second comparator COMP 2, which can generate a logical signal supplied to the third input of a bi-directional stable logic circuit FFD 1 for prohibiting the usage of a power switch Ml only in a preliminarily set time.
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公开(公告)号：JPH07264040A
公开(公告)日：1995-10-13
申请号：JP26549394
申请日：1994-10-28
Applicant: ST MICROELECTRONICS SRL
Inventor： CORDINI PAOLO , PEDRAZZINI GIORGIO , ROSSI DOMENICO
IPC: H03K19/0175
Abstract: PURPOSE: To actualize an input/output stage which is arranged for operation with a low and a high voltage by mixed technologies. CONSTITUTION: The source-collector path of 1st and 2nd transistors(TR) M1 and M2 and the collector-source path of a 3rd TR M3 are connected across a power source in series, a diode D2 is connected in parallel to the source- collector path of the TR M2; and a circuit node A as the connection point between the cathode of the diode D2 and the collector of the TR M3 is regarded as an I/O terminal and connected to an input circuit 3, and the voltage from a drive circuit means is applied to the gate terminals of the TRs M1 to M3.
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10.发明专利
公开(公告)号：JPH06216657A
公开(公告)日：1994-08-05
申请号：JP25491693
申请日：1993-09-16
Applicant: ST MICROELECTRONICS SRL
Inventor： ONETTI ANDREA MARIO , ROSSI DOMENICO
Abstract: PURPOSE: To provide a mutual differential conductance input stage in which a bias condition is corrected by varying amplitude of a signal to be supplied to an input stage of a differential stage to improve entire noise characteristics of an amplifier. CONSTITUTION: The differential stage is configured by providing a means to reduce bias current by an amount in inversely proportional to the amplitude of an input signal vin with the differential stage including a pair of transistors Q1 and Q2 with a degenerate resistor R. Noise at a high level generated by an input stage in a conventional device with high input dynamic characteristics is solved by the differential stage.
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