公开(公告)号：EP1536480A1

公开(公告)日：2005-06-01

申请号：EP03425764.2

申请日：2003-11-28

Applicant: STMicroelectronics S.r.l.

Inventor： Alessandria, Antonino Sebastiano ,  Fragapane, Leonardo ,  Magri, Angelo

IPC: H01L29/423 ,  H01L29/739 ,  H01L29/78

CPC classification number: H01L29/7813 ,  H01L21/2815 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/4933 ,  H01L29/66348 ,  H01L29/7397 ,  H01L29/7811

Abstract: The invention relates to a semiconductor power device (20) with insulated gate and improved trench-gate structure, of the type wherein the trench-gate structure is realised on a semiconductor substrate (1) covered by at least an epitaxial layer (3) and by means of a trench (29) realised in the semiconductor to form the device gate region (27); a dielectric coating (28) being provided on the inner and bottom walls of the trench (29), characterised in that said gate region (27) comprises a conductive spacer layer (30) on said coating layer (28) only in correspondence with the inner walls of the trench (29).

Abstract translation: 本发明涉及到一个半导体功率器件（20），绝缘栅和改进的沟槽栅结构，所述类型的worin沟槽栅极结构是在半导体基片实现（1）覆盖的至少上的外延层（3）和 通过沟槽的装置（29）实现在半导体器件以形成栅极区（27）; 的电介质涂层（28）被设置在沟槽（29）的内壁和底壁上，DASS所述栅极区（27）包括仅在对应所述涂层层上的导电间隔物层（30）（28）与所述 该沟槽（29）的内壁上。

公开(公告)号：EP0860947B1

公开(公告)日：2004-10-13

申请号：EP97830072.1

申请日：1997-02-19

Applicant: STMicroelectronics S.r.l.

Inventor： Fragapane, Leonardo ,  Letor, Romeo

IPC: H03K17/082

CPC classification number: H03K17/0822 ,  H03K17/0828

公开(公告)号：EP1469523B1

公开(公告)日：2008-12-24

申请号：EP03425242.9

申请日：2003-04-18

Applicant: STMicroelectronics S.r.l.

Inventor： Fragapane, Leonardo ,  Alessandria, Antonino

IPC: H01L29/739 ,  H01L27/07 ,  H01L27/02

CPC classification number: H01L29/866 ,  H01L27/0255 ,  H01L27/0788 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/7395

公开(公告)号：EP1022785B1

公开(公告)日：2006-04-05

申请号：EP99830023.0

申请日：1999-01-25

Applicant: STMicroelectronics S.r.l.

Inventor： Fragapane, Leonardo

IPC: H01L29/739 ,  H01L29/10 ,  H01L27/06

CPC classification number: H01L29/1095 ,  H01L27/0611 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/00

公开(公告)号：EP1221718A1

公开(公告)日：2002-07-10

申请号：EP01830004.6

申请日：2001-01-08

Applicant: STMicroelectronics S.r.l.

Inventor： Letor, Romeo ,  Torres, Antonino ,  Fragapane, Leonardo

IPC: H01L25/16 ,  H01L27/02

CPC classification number: H01L27/0248

Abstract: The integrated power device (100) comprises a power transistor (2) made up of a first diode (25) and a second diode (26) which are connected together in series between a collector region (6) and emitter-contact region (14) of the power transistor (2) and define a common intermediate node (24). The power device (100) also comprises a control circuit (3) including a high-voltage region (30) bonded on the emitter-contact region (14) by means of an adhesive layer (108), and biasing means (109, 110, 111) connected between the common intermediate node (24) and the high-voltage region (30). The biasing means (109, 110, 111) comprise a contact pad (109) electrically connected to the common intermediate node (24), an electrical connection region (111) which is in electrical contact with the high-voltage region (30), and a wire (110) having a first end soldered on the contact pad (109) and a second end soldered on said electrical connection region (111).

Abstract translation: 集成功率器件（100）包括由第一二极管（25）和第二二极管（26）构成的功率晶体管（2），它们串联在集电极区域（6）和发射极 - 接触区域（14）之间 ）并且限定公共中间节点（24）。 功率器件（100）还包括控制电路（3），该控制电路（3）包括通过粘合剂层（108）接合在发射极 - 接触区域（14）上的高压区域（30）和偏置装置（109,110 ，111）连接在公共中间节点（24）和高压区域（30）之间。 偏置装置（109,110,111）包括电连接到公共中间节点（24）的接触焊盘（109），与高压区域（30）电接触的电连接区域（111） 以及具有焊接在所述接触焊盘（109）上的第一端和焊接在所述电连接区域（111）上的第二端的导线（110）。

公开(公告)号：EP2924734A1

公开(公告)日：2015-09-30

申请号：EP15161793.3

申请日：2015-03-30

Applicant: STMicroelectronics S.r.l.

Inventor： Fragapane, Leonardo ,  Alessandria, Antonino

IPC: H01L27/08 ,  H01L27/06 ,  H01L27/07 ,  H01L29/868 ,  H01L29/78

CPC classification number: H01L29/868 ,  H01L27/0629 ,  H01L27/0664 ,  H01L27/0694 ,  H01L27/0727 ,  H01L27/0814 ,  H01L29/0692 ,  H01L29/36 ,  H01L29/43 ,  H01L29/66136 ,  H01L29/7804

Abstract: A diode (100; 200) is proposed. The diode is integrated on a chip (105) of semiconductor material having an anode surface (105a) and a cathode surface (105c) opposite to each other. The diode comprises at least one cathode region (120) having a doping of a first type, the cathode region extending from the cathode surface in the chip. Furthermore, the diode comprises an intrinsic region (130) having a doping of the first type with a dopant concentration lower than a dopant concentration of the cathode region, the intrinsic region extending between the anode surface and the cathode region. In addition, the diode comprises a plurality of anode regions (135c, 135f) having a doping of a second type, each anode region extending from the anode surface in the intrinsic region. The diode further comprises a cathode electrode (110) of electrically conductive material electrically coupled with said at least one cathode region on the cathode surface, and an anode electrode (115) of electrically conducting material. In the solution according to an embodiment of the present disclosure, one or more contacted anode regions (135c) of said anode regions are electrically coupled with the anode electrode on the anode surface, and one or more floating anode regions (135f) of said anode regions are electrically insulated from the anode electrode. The diode is configured so that charge carriers are injected from said at least one floating anode region into the intrinsic region in response to the applying of a control voltage between the anode electrode and the cathode electrode exceeding a threshold voltage of the diode.

Abstract translation: 提出了二极管（100; 200）。 二极管集成在具有彼此相对的阳极表面（105a）和阴极表面（105c）的半导体材料的芯片（105）上。 二极管包括至少一个具有第一类型掺杂的阴极区域（120），阴极区域从芯片中的阴极表面延伸。 此外，二极管包括具有掺杂浓度低于阴极区域的掺杂剂浓度的第一类型的本征区域（130），本征区域在阳极表面和阴极区域之间延伸。 此外，二极管包括具有第二类型的掺杂的多个阳极区域（135c，135f），每个阳极区域在本征区域中从阳极表面延伸。 二极管还包括与阴极表面上的所述至少一个阴极区电耦合的导电材料的阴极电极和导电材料的阳极电极。 在根据本公开的实施例的解决方案中，所述阳极区域的一个或多个接触阳极区域（135c）与阳极表面上的阳极电电耦合，并且所述阳极的一个或多个浮动阳极区域（135f） 区域与阳极电极电绝缘。 二极管被配置为使得电荷载流子响应于在阳极电极和阴极之间施加超过二极管的阈值电压的控制电压，从所述至少一个浮动阳极区域注入本征区域。

公开(公告)号：EP1231635A1

公开(公告)日：2002-08-14

申请号：EP01830082.2

申请日：2001-02-09

Applicant: STMicroelectronics S.r.l.

Inventor： Magri, Angelo ,  Fragapane, Leonardo

IPC: H01L23/495 ,  H01L25/065

CPC classification number: H01L24/06 ,  H01L23/49562 ,  H01L24/48 ,  H01L24/49 ,  H01L25/071 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/01093 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A method of manufacturing an electronic structure, which structure comprises a first power device (1) and a second unidirectional device (120), both integrated in the same protective package;
the first device (1) having at least first and second electrodes (8,9) of the first device (1), with said first electrode (8) of the first device (1) being attached to the package; and
the second device (120) having first and second electrodes (170,160) of the second device (120); wherein the first electrode (170) of the second device (120) is superposed on the second electrode (9) of the first device (1) and connected electrically to the second electrode (9) of the first device (1).

Abstract translation: 制造电子结构，该结构包括一个第一电源装置（1）和第二单向设备（120），这两个集成在同一保护封装的方法; （1）具有在所述第一设备（1）的至少第一和第二电极（8.9）的第一装置，与所述第一电极（8），所述第一设备（1）被附接到所述封装; 和第二装置（120），其具有所述第二设备（120）的第一和第二电极（170.160）; worin所述第二装置的所述第一电极（170）（120）被叠加在所述第一设备（1）的所述第二电极（9），并电连接到所述第一装置（1）的所述第二电极（9）。

公开(公告)号：EP1058316A1

公开(公告)日：2000-12-06

申请号：EP99830343.2

申请日：1999-06-04

Applicant: STMicroelectronics S.r.l.

Inventor： Fragapane, Leonardo ,  Magri', Angelo

IPC: H01L29/739 ,  H01L29/78 ,  H01L29/08 ,  H01L21/331 ,  H01L21/336

CPC classification number: H01L29/7802 ,  H01L29/0834 ,  H01L29/0847 ,  H01L29/7395

Abstract: A MOS power device such as a power MOSFET (eg. VDMOS) or an insulated gate bipolar transistor (ie. IGBT) with a high dynamic ruggedness, which comprises a parasitic bipolar transistor having its base in a base region (3,5) of the power device and means for counter-biasing the parasitic bipolar transistor. The counter-biasing means are resistive means inserted between a source region (4) of the power device and an emitter (E1) of the parasitic bipolar transistor (NPN). Said resistive means may consist of a lightly doped region (12) of the same conductivity type as that of the source region (4) of the power device and disposed in the base region (3,5) of the power device, under said source region (4).

Abstract translation: 诸如功率MOSFET（例如VDMOS）或具有高动态耐用性的绝缘栅双极晶体管（即，IGBT）的MOS功率器件，其包括其基极在基极区域（3,5）中的基极的寄生双极晶体管 功率器件和用于对寄生双极晶体管进行反偏置的装置。 反偏置装置是插入在功率器件的源极区（4）和寄生双极晶体管（NPN）的发射极（E1）之间的电阻性装置。 所述电阻装置可以由与功率器件的源极区域（4）相同导电类型的轻掺杂区域（12）组成，并且设置在功率器件的基极区域（3,5）内，在所述源极 区域（4）。

公开(公告)号：EP1865592A1

公开(公告)日：2007-12-12

申请号：EP06425378.4

申请日：2006-06-05

Applicant: STMicroelectronics S.r.l.

Inventor： Selgi, Lorenzo Maurizio ,  Fragapane, Leonardo ,  Arcuri, Luigi

IPC: H02M3/335 ,  H02M1/00

CPC classification number: H02M1/36 ,  H02M3/33507 ,  Y10S323/901

Abstract: An electronic power device (2) for controlling a load (3), comprising: a high-voltage integrated switch (8) having an output terminal to be connected to said load; integrated, and low-voltage driving means (9) for driving the switch (8), a start-up integrated circuit (10) comprising a high-voltage resistor (15) that can be enabled, during a step of turning on said power device (2), in order to activate the driving means. Said device is characterized in that the switch (8) and the start-up circuit (10) are integrated in a first semiconductor chip and the driving means (9) is integrated in a different, second semiconductor chip.

Abstract translation: 一种用于控制负载（3）的电子设备（2），包括：具有要连接到所述负载的输出端子的高压集成开关（8）; 集成和低电压驱动装置（9），用于驱动开关（8）;启动集成电路（10），包括可以启动的高压电阻（15），所述启动集成电路 装置（2），以激活驱动装置。 所述装置的特征在于，开关（8）和启动电路（10）集成在第一半导体芯片中，并且驱动装置（9）集成在不同的第二半导体芯片中。

公开(公告)号：EP1047133A1

公开(公告)日：2000-10-25

申请号：EP99830238.4

申请日：1999-04-23

Applicant: STMicroelectronics S.r.l.

Inventor： Fragapane, Leonardo

IPC: H01L27/06 ,  H01L29/739 ,  H01L21/331

CPC classification number: H01L29/66333 ,  H01L27/0623 ,  H01L29/7396

Abstract: A method for producing devices for control circuits integrated in power devices, the particularity of which is the fact that it comprises the steps that consist in:

forming a signal device inside an active area of a power device in a chip;
forming, by means of an implantation, an edge structure of the signal device and providing, by means of the implantation of the edge structure, at the active area of the signal device, a P-type well at a lower concentration than wells of holes arranged at the source and drain regions of the signal device, the well of holes providing electrical continuity between the drain and source regions of the signal device.

Abstract translation: 功率器件（IGBT）在其有源区域中形成有金属氧化物半导体信号晶体管（LMOS）。 通过以高能量注入氦气形成边缘结构，并通过扩散铝以提供比在孔（P--）的孔的孔更低的浓度的孔（P--） 信号装置。 因此，在这些源区和漏区之间提供电连续性。 对于设置在同一芯片上的功率器件的控制电路，还包括独立权利要求。