Abstract:
Probe head assemblies and probe systems for testing integrated circuit devices are disclosed herein. In one embodiment, the probe head assemblies include a contacting structure and a space transformer assembly, in another embodiment, the probe head assemblies include a contacting structure, a suspension system, a flex cable interface, and a space transformer including a space transformer body and a flex cable assembly. In another embodiment, the probe head assemblies include a contacting structure, a space transformer, and a planarization layer. In another embodiment, the probe head assemblies include a contacting structure, a space transformer, a suspension system, a platen, a printed circuit board, a first plurality of signal conductors configured to convey a first plurality of signals external to the space transformer, and a second plurality of signal conductors configured to convey a second plurality of signals via the space transformer. The probe systems include the probe head assemblies.
Abstract:
Space transformers, planarization layers for space transformers, methods of fabricating space transformers, and methods of planarizing space transformers are disclosed herein. In one embodiment, the space transformers include a space transformer assembly including a first rigid space transformer layer, a second rigid space transformer layer, and an attachment layer that extends between the first rigid space transformer layer and the second rigid space transformer layer. In another embodiment, the space transformers include a space transformer body and a flex cable assembly. The planarization layer includes an interposer, a resilient dielectric layer, a planarized rigid dielectric layer, a plurality of holes, and an electrically conductive paste extending within the plurality of holes. In one embodiment, the methods include methods of fabricating the space transformer assembly. In another embodiment, the methods include methods of planarizing a space transformer.
Abstract:
Shielded probe systems are disclosed herein. The shielded probe systems are configured to test a device under test (DUT) and include an enclosure that defines an enclosure volume, a translation stage with a stage surface, a substrate-supporting stack extending from the stage surface, an electrically conductive shielding structure, an isolation structure, and a thermal shielding structure. The substrate-supporting stack includes an electrically conductive support surface and a temperature-controlled chuck. The electrically conductive shielding structure defines a shielded volume. The isolation structure electrically isolates the electrically conductive shielding structure from the enclosure and from the translation stage. The thermal shielding structure extends within the enclosure volume and at least partially between the enclosure and the substrate-supporting stack.
Abstract:
Probe systems, storage media, and methods for wafer-level testing over extended temperature ranges are disclosed herein. The methods are configured to test a plurality of devices under test (DUTs) present on a substrate. The probe systems are programmed to perform the methods. The storage media include computer-readable instructions that direct a probe system to perform the methods.
Abstract:
Probe systems and methods including active environmental control are disclosed herein. The methods include placing a substrate, which includes a device under test (DUT), on a support surface of a chuck. The support surface extends within a measurement environment that is at least partially surrounded by a measurement chamber. The methods further include determining a variable associated with a moisture content of the measurement environment and receiving a temperature associated with the measurement environment. The methods also include supplying a purge gas stream to the measurement chamber at a purge gas flow rate and selectively varying the purge gas flow rate such that a dew point temperature of the measurement environment is within a target dew point temperature range. The methods further include providing a test signal to the DUT and receiving a resultant signal from the DUT. The systems include probe systems that perform the methods.