DATA PROCESSING SYSTEM HAVING DUAL-CHANNEL SYSTEM BUS
    91.
    发明申请
    DATA PROCESSING SYSTEM HAVING DUAL-CHANNEL SYSTEM BUS 审中-公开
    具有双通道系统总线的数据处理系统

    公开(公告)号:WO1982003739A1

    公开(公告)日:1982-10-28

    申请号:PCT/US1982000454

    申请日:1982-04-13

    Applicant: NCR CORP

    CPC classification number: H04L12/44

    Abstract: A data processing system includes a plurality of stations (412), first and second star couplers (416A, 416B) and first and second pairs of transmission lines (414A, 414B) associated with each station (412). The first pair of transmission lines (414A) is connected between its associated station (412) and the first star coupler (416A) and the second pair of transmission lines (414B) is connected between its associated station (412) and the second star coupler (416B). Each pair of transmission lines includes a first transmission line (418A, 418B) for carrying signals from its associated station (412) and a second transmission line (420A, 420B) for carrying signals to its associated station (412). Each station (412) includes a plurality of subsystems (424A, 424B, 424C), coupled by respective interface circuits (428) to both pairs of transmission lines. The system provides reduced transmission interference and high reliability. The star couplers are preferably optical but may be electrical or magnetic star couplers.

    Abstract translation: 数据处理系统包括与每个站(412)相关联的多个站(412),第一和第二星形耦合器(416A,416B)以及第一和第二对传输线(414A,414B)。 第一对传输线(414A)连接在其相关站(412)和第一星形耦合器(416A)之间,第二对传输线(414B)连接在其相关站(412)和第二星形耦合器 (416B)。 每对传输线包括用于承载来自其相关联站(412)的信号的第一传输线(418A,418B)和用于将信号传送到其相关站(412)的第二传输线(420A,420B)。 每个站(412)包括由相应的接口电路(428)耦合到两对传输线的多个子系统(424A,424B,424C)。 该系统提供降低的传输干扰和高可靠性。 星形耦合器优选是光学的,但是可以是电或磁性星形耦合器。

    DATA PROCESSING SYSTEM HAVING ERROR CHECKING CAPABILITY
    92.
    发明申请
    DATA PROCESSING SYSTEM HAVING ERROR CHECKING CAPABILITY 审中-公开
    具有错误检查能力的数据处理系统

    公开(公告)号:WO1982003710A1

    公开(公告)日:1982-10-28

    申请号:PCT/US1982000456

    申请日:1982-04-13

    Applicant: NCR CORP

    Abstract: A data processing system (10) includes a plurality of subsystems coupled via respective interface circuits (28) to a pair of transmission lines (18, 20) for carrying messages inrespective directions from and to the subsystems. The transmission lines (18, 20) are interconnected by an optical star coupler (16). The interface circuits (28) include respective error detection circuits arranged to detect errors in every transmitted message. Thus errors may be detected in a transmitted message even if the message is not intended to be received by the subsystem whose associated interface circuit (28) detects an error. For certain detected errors an ABORT signal is produced to cause the erroneous message to be garbled by the superposition of binary "1" signals. The subsystems include circuits which detect when the postamble of a message is garbled.

    Abstract translation: 数据处理系统(10)包括经由相应接口电路(28)耦合到一对传输线(18,20)的多个子系统,用于在子系统的相关方向上承载消息。 传输线(18,20)通过光学星形耦合器(16)互连。 接口电路(28)包括各自的错误检测电路,其布置成检测每个发送的消息中的错误。 因此,即使消息不是由相关联的接口电路(28)检测到错误的子系统接收,也可能在发送的消息中检测到错误。 对于某些检测到的错误,产生了ABORT信号,以通过二进制“1”信号的叠加使错误的消息发生乱码。 子系统包括检测消息的后同步码何时发生乱码的电路。

    POWER SUPPLY DIAGNOSTIC SYSTEM
    93.
    发明申请
    POWER SUPPLY DIAGNOSTIC SYSTEM 审中-公开
    电源诊断系统

    公开(公告)号:WO1982003137A1

    公开(公告)日:1982-09-16

    申请号:PCT/US1982000296

    申请日:1982-03-08

    Applicant: NCR CORP

    CPC classification number: G01R31/40 H02M3/33507

    Abstract: A power supply includes a digital controller (10) which generates pulse-width modulated control signals for controlling the duty cycles of switching transistors (36) for the purpose of regulating the output voltage of the power supply. The controller (10) incorporates a diagnostic system which includes a plurality of comparators (297) arranged to compare each of a number of voltage level signals representing operating conditions at portions of the power supply with a reference voltage, and logic circuits (330-348) responsive to the outputs of the two comparators for generating an output identifying an element of the power supply which has failed. This output is stored and is displayed in a LED display (154) which is actuated by operation of a switch member (360). Integrated circuit chips may be used in the controller so that the diagnostic system is of simple construction and of low cost.

    Abstract translation: 电源包括数字控制器(10),其产生用于控制开关晶体管(36)的占空比的用于调节电源的输出电压的脉宽调制控制信号。 控制器(10)包括诊断系统,该诊断系统包括多个比较器(297),该多个比较器(297)被布置为将表示电源部分的操作条件的多个电压电平信号中的每一个与参考电压进行比较,以及逻辑电路(330-348 )响应于两个比较器的输出,用于产生识别已经失败的电源的元件的输出。 该输出被存储并显示在通过开关构件(360)的操作致动的LED显示器(154)中。 集成电路芯片可用于控制器,使诊断系统结构简单,成本低廉。

    CUSTOMER QUEUE CONTROL APPARATUS
    94.
    发明申请
    CUSTOMER QUEUE CONTROL APPARATUS 审中-公开
    客户队列控制装置

    公开(公告)号:WO1982002972A1

    公开(公告)日:1982-09-02

    申请号:PCT/US1982000189

    申请日:1982-02-16

    Applicant: NCR CORP

    CPC classification number: G08B3/1008 G07C11/00 G07C2011/04

    Abstract: Customer queue control apparatus for an establishment having a plurality of service stations (40-50) utilizes a main queue and a plurality of local queues having not more than two members, at the individual service stations (40-50). A switch (66) detects the presence of a customer at the head of the main queue and keys (52) at the individual service stations (40-50) are utilized by the operators to signal that the station is open for business or that a customer has left the station after service. A synthesized voice message directs the customer to a local queue determined to have the expected minimum waiting time, dependent on the number of customers in each local queue, and the probable service time per customer in each local queue.

    Abstract translation: 用于具有多个服务站(40-50)的机构的客户队列控制装置在各个服务站(40-50)处使用具有不超过两个成员的主队列和多个本地队列。 开关(66)检测在主队列的头部处的顾客的存在,并且在各个服务站(40-50)处的钥匙(52)被操作者用来表示该车站是开放营业的,或者 客户服务后离开了车站。 合成语音消息指导客户到本地队列,该队列被确定为具有预期最小等待时间,取决于每个本地队列中的客户数量以及每个本地队列中每个客户的可能的服务时间。

    PLASMA CHARGE TRANSFER DEVICE
    95.
    发明申请
    PLASMA CHARGE TRANSFER DEVICE 审中-公开
    等离子体充电传输装置

    公开(公告)号:WO1982002314A1

    公开(公告)日:1982-07-08

    申请号:PCT/US1981001734

    申请日:1981-12-21

    Applicant: NCR CORP

    CPC classification number: G09G3/29 G09G3/296

    Abstract: A plasma charge transfer device display system includes input driver circuits (7) coupled to respective input driver lines of a display panel (3) and phase driver circuits (8) coupled to phase driver lines for shifting trapped charge in the panel (3). A power supply (9) provides a toggle voltage V which switches alternately between +140 volts and -60 volts and which is applied to the input driver circuits (7). Control logic (4) causes the voltages on selected ones of the input driver lines to switch from -60 volts to +140 volts simultaneously with the switching of the voltage on the first one of the phase driver lines from +140 volts to zero volts; the resulting large transient voltage changes cause gas discharges. The phase driver line switches back to +140 volts before the input driver line switches back to -60 volts. Trapped charges are progressed along the device in synchronism with switching of the phase drivers (8). The device operates with relatively low absolute magnitude voltages enabling implementation by hybrid or monolithic circuits.

    Abstract translation: 等离子体电荷转移装置显示系统包括耦合到显示面板(3)的相应输入驱动线的输入驱动电路(7)和耦合到相位驱动器线路的相位驱动器电路(8),用于移动面板(3)中的俘获电荷。 电源(9)提供在+140伏特和-60伏之间交替切换并被施加到输入驱动器电路(7)的切换电压V. 控制逻辑(4)使得所选输入驱动器线路中的电压从-60伏特转换到+140伏特,同时将第一相位驱动器线路上的电压从+140伏特切换到零伏; 所产生的大瞬变电压变化导致气体放电。 输入驱动器线路切换回-60伏之前,相位驱动器线路切换回+140伏。 被捕获的电荷与相位驱动器(8)的切换同步地沿设备进行。 该器件采用相对较低的绝对幅度电压工作,可实现混合或单片电路。

    RANDOM NUMBER GENERATOR
    96.
    发明申请
    RANDOM NUMBER GENERATOR 审中-公开
    随机数发电机

    公开(公告)号:WO1982001969A1

    公开(公告)日:1982-06-10

    申请号:PCT/US1981001519

    申请日:1981-11-16

    Applicant: NCR CORP

    CPC classification number: G06F7/588 G06F7/58 H03K3/84

    Abstract: Un generateur de nombres au hasard (10) produit des bits variant au hasard, dans lequel les problemes de polarisation et d'autocorrelation sont reduits dans un circuit (30, 40, 42, 48) couple a un generateur de bruit et a un circuit d'echantillonnage (12, 26). Pour reduire l'autocorrelation, les bits variant au hasard sont stockes dans un premier registre a decalage (30), les bits dans le registre a decalage etant couples a un second registre a decalage (40). Le second registre a decalage (40) est controle dans le temps par un compteur (48) sensible aux bits envoyes au premier registre a decalage de maniere telle que la synchronisation du second registre a decalage n'ait lieu qu'apres rejet d'un certain nombre de bits par le premier registre a decalage. Pour reduire la polarisation, les registres a decalage sont couples par des portes OU EXCLUSIF (42A-42N) et les sorties du second registre a decalage sont couples aux entrees des portes OU EXCLUSIF.

    DATA COMMUNICATION BUS STRUCTURE
    97.
    发明申请
    DATA COMMUNICATION BUS STRUCTURE 审中-公开
    数据通信总线结构

    公开(公告)号:WO1982001607A1

    公开(公告)日:1982-05-13

    申请号:PCT/US1981001396

    申请日:1981-10-16

    Applicant: NCR CORP

    CPC classification number: G06F13/4072 G06F13/4217

    Abstract: In order to provide fast data transfers and to ensure that the capacitive loading remains fixed, a data communication bus structure for interconnecting a desired number of subsystems of a data processing system comprises an integrated circuit (1) having bus conductors (50, 60, 70) of fixed length and a fixed number of ports (10, 20, 30) for connecting the subsystems. Each port comprises the control and data terminals for a group of driver/receiver circuits (11-13, 21-23, 31-33), each driver/receiver circuit of a group being connected to a respective bus conductor. Each driver/receiver circuit comprises a driver circuit having address and data output latches and driver gates, and a receiver circuit having address and data input latches.

    Abstract translation: 为了提供快速数据传输并且确保电容性负载保持固定,用于互连数据处理系统的期望数量的子系统的数据通信总线结构包括具有总线导体(50,60,70)的集成电路(1) )和固定数量的端口(10,20,30),用于连接子系统。 每个端口包括用于一组驱动器/接收器电路(11-13,21-23,31-33)的控制和数据端子,一组的每个驱动器/接收器电路连接到相应的总线导体。 每个驱动器/接收器电路包括具有地址和数据输出锁存器和驱动器门的驱动器电路,以及具有地址和数据输入锁存器的接收器电路。

    METHOD AND APPARATUS FOR INK JET PRINTING
    98.
    发明申请
    METHOD AND APPARATUS FOR INK JET PRINTING 审中-公开
    喷墨印刷的方法和装置

    公开(公告)号:WO1982001245A1

    公开(公告)日:1982-04-15

    申请号:PCT/US1981001238

    申请日:1981-09-14

    Applicant: NCR CORP

    CPC classification number: G01D15/18 B41J2/02

    Abstract: Apparatus and method for ink jet printing in which ink (14) circulated in a continuous moving stream in a closed capillary tube (10) is caused to be deflected at a point inside the circulating ink system by deflecting means (18) arranged to produce pressure pulses to effect a printing operation by deflecting ink from the stream towards a nozzle (20). The deflected ink is ejected through the nozzle (20) in the form of droplets. The velocity (V u) of the ejected droplets depends upon the velocity of the continuously-flowing ink (V u) and on the velocity of the deflection pulse (V u).

    Abstract translation: 用于喷墨打印的设备和方法,其中在密闭的毛细管(10)中以连续移动的流中循环的墨(14)在循环墨水系统内部的点处被偏转,偏转装置(18)布置成产生压力 脉冲以通过使油墨从喷嘴(20)偏转来进行打印操作。 偏转的墨水以液滴的形式喷射通过喷嘴(20)。 喷射的液滴的速度(V u)取决于连续流动的油墨(V u)u的速度和偏转脉冲(V u)的速度。

    KEYBOARD AND METHOD OF PRODUCING A KEYBOARD
    99.
    发明申请
    KEYBOARD AND METHOD OF PRODUCING A KEYBOARD 审中-公开
    键盘和生成键盘的方法

    公开(公告)号:WO1982001100A1

    公开(公告)日:1982-04-01

    申请号:PCT/US1981001214

    申请日:1981-09-09

    Applicant: NCR CORP

    Abstract: A keyboard includes a resilient foam layer (28) having an array of holes (30) therein with the layer (28) being sandwiched between a flexible sheet having dome-shaped areas (34) aligned with said holes and a dielectric member (38), the flexible sheet and dielectric member having electrodes (36, 40) thereon which are arranged to complete a circuit associated with a hole (30) when the flexible sheet and member are moved toward each other. A snap action of the dome-shaped areas (34) in the switch movement provides for improved tactile response and switch travel and reduced switch actuating force. Additional foam layers enhance the operating characteristics of the embodiments. A method of production of the keyboard entails determining the operating parameters of a desired keyboard and selecting the relative density and thicknesses of various resilient layers and flexible sheets in the keyboard to determine the switch actuating force, the extent of travel of the switch, and the location of the "makepoint" of the switch at a position between the start and end of switch travel.

    Abstract translation: 键盘包括弹性泡沫层(28),弹性泡沫层(28)具有孔阵列(30),其中所述层(28)被夹在具有与所述孔对准的圆顶形区域(34)的柔性片材和电介质构件(38)之间, 所述柔性片和电介质构件具有电极(36,40),当所述柔性片和构件彼此相对移动时,所述柔性片和电介质构件布置成完成与孔(30)相关联的电路。 开关运动中圆顶形区域(34)的快速动作提供了改善的触觉响应和开关行程以及降低的开关致动力。 附加的泡沫层增强了实施例的操作特性。 制作键盘的方法需要确定期望的键盘的操作参数,并且选择键盘中的各种弹性层和柔性片材的相对密度和厚度以确定开关致动力,开关的行程范围和 开关的“makepoint”位于开关行程开始和结束之间的位置。

    INPUT/OUTPUT PROCESSOR AND METHOD OF COMMUNICATION FOR DATA PROCESSING SYSTEM
    100.
    发明申请
    INPUT/OUTPUT PROCESSOR AND METHOD OF COMMUNICATION FOR DATA PROCESSING SYSTEM 审中-公开
    输入/输出处理器和数据处理系统通信方法

    公开(公告)号:WO1982000374A1

    公开(公告)日:1982-02-04

    申请号:PCT/US1981000901

    申请日:1981-07-02

    Applicant: NCR CORP

    Inventor: NCR CORP DUKE J CHARI V

    CPC classification number: G06F13/22 G06F13/124

    Abstract: A data processing system including processing elements (22) and a central memory (10) has an input/output system for handling high data flow rates comprising an I/O processor (23) providing serial lines (31) to a plurality of peripheral subsystems (30), the I/O processor comprising a dynamic channel exchange coupling the serial lines to at least one serial channel processor (20). Processor (20) includes arithmetic logic means, a scratch-pad, a buffer for data transfer between the dynamic channel exchange and the central memory, and a control store having a plurality of routines for implementing a method of communication between the I/O processor and the peripheral subsystems. The method of communication involving polling the ith serial channel for a peripheral ready indication, establishing a message exchange for communication if a peripheral ready indication is detected, checking for a processor element request for communication with a peripheral subsystem, and providing a message exchange for an initial communication across the corresponding bit line to the peripheral subsystem.

    Abstract translation: 包括处理元件(22)和中央存储器(10)的数据处理系统具有用于处理高数据流速的输入/输出系统,其包括向多个外围子系统提供串行线(31)的I / O处理器(23) (30),所述I / O处理器包括将串行线耦合到至少一个串行信道处理器(20)的动态信道交换。 处理器(20)包括算术逻辑装置,暂存器,用于在动态信道交换机和中央存储器之间进行数据传输的缓冲器,以及控制存储器,具有用于实现I / O处理器之间的通信方法的多个例程 和外围子系统。 涉及轮询第i个串行通道以进行外设就绪指示的通信方法,如果检测到外设准备就绪指示,则建立通信的消息交换,检查处理器元件与外围子系统通信的请求,以及为外部子系统提供消息交换 初始通信到相应的位线到外围子系统。

Patent Agency Ranking