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公开(公告)号:CA2866121A1
公开(公告)日:2013-09-12
申请号:CA2866121
申请日:2013-02-28
Applicant: PANASONIC IP CORP AMERICA
Inventor: SUGIO TOSHIYASU , NISHI TAKAHIRO , SHIBAHARA YOUJI , TANIKAWA KYOKO , SASAI HISAO , MATSUNOBU TORU , TERADA KENGO
IPC: H04N19/159 , H04N19/177 , H04N19/513 , H04N19/597
Abstract: A method for coding video, the method including: a flag coding step (S111) for coding a first flag indicating whether or not temporal motion vector prediction is to be used; and a first parameter coding step (S113) for coding a first parameter for calculating a temporal predictive motion vector when the first flag indicates that the temporal motion vector prediction is to be used (S112: Yes), whereby the first parameter is not coded (S116) when the first flag indicates that the temporal motion vector prediction is not to be used (S112: No).
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92.
公开(公告)号:AU2011250758B2
公开(公告)日:2012-04-05
申请号:AU2011250758
申请日:2011-11-11
Applicant: PANASONIC IP CORP AMERICA
Inventor: LIM CHONG SOON , NISHI TAKAHIRO , SHIBAHARA YOUJI
IPC: H04M1/00
Abstract: A method of decoding a coded stream obtained by coding a first picture group and a second picture group for each access unit including a picture of the first picture group 5 and a picture of the second picture group that corresponds to the picture of the first picture group, the first picture group and the second picture group being interlaced and captured at different view points, and said method comprising: extracting, from the coded stream, 10 first flag information indicating whether pictures included in the access unit are coded on a per-field basis or on a per-frame basis, and decoding the first flag information; decoding the picture of the second picture group on a per-frame basis by referring to the picture of 15 the first picture group on a per-frame basis, when the first flag information indicates that the pictures included in the access unit are coded on a per-frame basis; extracting, from the coded stream, second flag information indicating whether the pictures included in 20 the access unit are coded as top fields or bottom fields when the first flag information indicates that the pictures included in the access unit are coded on a per field basis, and decoding the second flag information; decoding the picture of the second picture group as a 25 top field by referring to the picture of the first picture group on a per-field basis, when the second flag information indicates that the pictures included in the access unit are coded as top fields; and decoding the picture of the second picture group as a bottom field by 30 referring to the picture of the first picture group on a per-field basis, when the second flag information indicates that the pictures included in the access unit are coded as bottom fields. 2949151_1 (GHMatters) P84360.AU.2 11/11/11 Code view components in access unit Determine reference field-pic-flag value S502 Start processing on each view component in access unit S1 Start processing on each slice in view component S512 Set field_pic flag value in slice header of slice to S514 be equal to reference field pic flag value Field_picflag equal to ""? Ys S55066 SS50 7 S !et 0" !tSetfebottom bfieldjlflag vauei -toireferen bottomfieldflag Next lice of view component s unit available?S5 Nos Net iew componve in acce i av ie 53 o 1 Endoto ildfa vlei
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公开(公告)号:MX2025000825A
公开(公告)日:2025-03-07
申请号:MX2025000825
申请日:2021-08-06
Applicant: PANASONIC IP CORP AMERICA
Inventor: LIM CHONG SOON , SUN HAI WEI , TEO HAN BOON , LI JING YA , KUO CHE-WEI , ABE KIYOFUMI , TOMA TADAMASA , NISHI TAKAHIRO , KATO YUSUKE
IPC: H04N19/52 , H04N19/105 , H04N19/119 , H04N19/159 , H04N19/176
Abstract: Se proporciona un codificador (100) que incluye: circuitería; y una memoria acoplada a la circuitería, en el cual en operación, la circuitería: genera una imagen de predicción de un bloque actual a ser procesado, por medio del uso de un primer vector de movimiento (paso S3001); y actualiza una tabla de predictores de vectores de movimiento basados en la historia (HMVP) por medio del uso de un primer candidato que tiene el primer vector de movimiento, la tabla de HMVP almacena, en un método de primera entrada-primera salida (FIFO), una pluralidad de segundos candidatos cada uno que tiene un segundo vector de movimiento usado para un bloque procesado (paso S3002), y en la actualización de la tabla de HMVP, la circuitería: determina si un tamaño del bloque actual es menor que o igual a un tamaño umbral (paso S30021); y omite la actualización de la tabla de HMVP (paso S30022) cuando se determina que el tamaño del bloque actual es menor que o igual al tamaño umbral (Si en el paso S30021).
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公开(公告)号:MX2024015641A
公开(公告)日:2025-02-10
申请号:MX2024015641
申请日:2024-12-16
Applicant: PANASONIC IP CORP AMERICA
Inventor: OHKAWA MASATO , IGUCHI NORITAKA , SUGIO TOSHIYASU , NISHI TAKAHIRO , DALLA LIBERA FABIO
IPC: G06T9/00
Abstract: Un método de decodificación incluye: recibir un flujo de bits generado al codificar puntos tridimensionales, cada uno incluye la primera información de atributos y segunda información de atributos (S401); y predecir la primera información de atributos al hacer referencia a la segunda información de atributos (S402). Por ejemplo, la primera información de atributos que se va a predecir y la segunda información de atributos a la que se va a hacer referencia se pueden incluir en el mismo punto tridimensional. Por ejemplo, la primera información de atributos que se va a predecir y la segunda información de atributos a la que se va a hacer referencia se pueden incluir en diferentes puntos tridimensionales. Por ejemplo, la primera información de atributos y la segunda información de atributos se pueden almacenar en un primer componente y un segundo componente, respectivamente.
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公开(公告)号:AU2023304865A1
公开(公告)日:2025-01-09
申请号:AU2023304865
申请日:2023-07-03
Applicant: PANASONIC IP CORP AMERICA
Inventor: TEO HAN BOON , GAO JINGYING , LIM CHONG SOON , YADAV PRAVEEN KUMAR , ABE KIYOFUMI , NISHI TAKAHIRO , TOMA TADAMASA
Abstract: A decoding device (200) comprises a circuit and a memory connected to the circuit, the circuit executing the operations of: decoding a plurality of neural network information sets each identifying a neural network filter (S601); decoding, from one access unit, two or more activation information sets each specifying one of the plurality of neural network information sets (S602); and applying, to one picture, two or more neural network filters identified by two or more neural network information sets specified by the two or more activation information sets (S603).
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公开(公告)号:MX2024004990A
公开(公告)日:2024-05-07
申请号:MX2024004990
申请日:2020-02-18
Applicant: PANASONIC IP CORP AMERICA
Inventor: LIM CHONG SOON , SUN HAI WEI , TOMA TADAMASA , NISHI TAKAHIRO , ABE KIYOFUMI , KANOH RYUICHI , SHASHIDHAR SUGHOSH PAVAN , TEO HAN BOON , LIAO RU LING , LI JING YA
IPC: H04N19/537 , H04N19/105 , H04N19/157 , H04N19/96
Abstract: Se proporciona un codificador de imagen el cual incluye conjunto de circuitos y una memoria acoplada al conjunto de circuitos. En operación, el conjunto de circuitos realiza: división de un bloque de imagen en una pluralidad de divisiones que incluyen una primera división que tiene una forma no rectangular (por ejemplo, una forma triangular) y una segunda división; predecir un primer vector de movimiento para la primera división y un segundo vector de movimiento para la segunda división; y codificar la primera división usando el primer vector de movimiento y la segunda división usando el segundo vector de movimiento.
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公开(公告)号:ZA202203500B
公开(公告)日:2023-08-30
申请号:ZA202203500
申请日:2022-03-25
Applicant: PANASONIC IP CORP AMERICA
Inventor: SUN HAI WEI , TEO HAN BOON , ABE KIYOFUMI , TOMA TADAMASA , NISHI TAKAHIRO , LI JING YA , LIM CHONG SOON , SHASHIDHAR SUGHOSH PAVAN , LIAO RU LING
Abstract: A coding device (100) is provided with a circuit (160) and a memory (162) connected to the circuit (160). The circuit (160): selects, from a plurality of tables which are used, during an operation, to correct a reference motion vector into a predetermined direction using a correction value designated by an index, and which have correction values with respectively different intervals between indexes, a first table used for a partition to be coded of an image in a moving image; writes a parameter indicating a first index to be selected from among indexes included in the first table; and codes the partition using the reference motion vector corrected by means of a correction value designated by the first index.
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98.
公开(公告)号:AU2023201643A1
公开(公告)日:2023-04-20
申请号:AU2023201643
申请日:2023-03-15
Applicant: PANASONIC IP CORP AMERICA
Inventor: LI JING YA , LIM CHONG SOON , SHASHIDHAR SUGHOSH PAVAN , LIAO RU LING , SUN HAI WEI , TEO HAN BOON , ABE KIYOFUMI , TOMA TADAMASA , NISHI TAKAHIRO
IPC: H04N19/52
Abstract: An encoder (100) includes circuitry (160) and memory (162) connected to the circuitry (160). In operation, the circuitry (160): selects a first table to be 5 used for a current partition to be encoded in an image of a video, from among tables that are used to correct a base motion vector in a predetermined direction using a correction value specified by an index, the tables including correction values having varying differences between indexes; writes a parameter indicating a first index to be selected from among indexes included in the first 10 table; and encodes the current partition using the base motion vector corrected using a correction value specified by the first index. 19479675_1
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公开(公告)号:CA3100839C
公开(公告)日:2022-06-21
申请号:CA3100839
申请日:2019-05-09
Applicant: PANASONIC IP CORP AMERICA
Inventor: TOMA TADAMASA , NISHI TAKAHIRO , ABE KIYOFUMI , KANOH RYUICHI , LIM CHONG SOON , SHASHIDHAR SUGHOSH PAVAN , LIAO RU LING , SUN HAI WEI , TEO HAN BOON , LI JING YA
IPC: H04N19/119 , H04N19/176 , H04N19/70
Abstract: A coding device (100) performs division into a plurality of blocks by using a block division mode set obtained by combining one or more block division modes which define division types. The block division mode set comprises: a first block division mode in which the number of divisions and the dividing direction for dividing a first block are defined; and a second block division mode in which the number of divisions and the dividing direction for dividing a second block, which is one of blocks acquired by dividing the first block are defined. When a division in the first block mode results in three blocks, the second block is the center block among the blocks acquired by dividing the first block, and the dividing direction of the second block division mode is the same as the dividing direction of the first block division mode, then the second block division mode includes only a block division mode in which a division results in three blocks.
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公开(公告)号:BR112013027350B1
公开(公告)日:2022-06-07
申请号:BR112013027350
申请日:2012-10-18
Applicant: PANASONIC CORP , PANASONIC IP CORP AMERICA , SUN PATENT TRUST
Inventor: CHONG SOON LIM , HAI WEI SUN , SASAI HISAO , TERADA KENGO , TANIKAWA KYOKO , SUE MON THET NAING , NISHI TAKAHIRO , MATSUNOBU TORU , SUGIO TOSHIYASU , WAHADANIAH VIKTOR , SHIBAHARA YOUJI
IPC: H04N7/00
Abstract: métodos e codificação de imagem, método de decodificação de imagem, aparelho de codificação de imagem e aparelho de decodificação de imagem. trata-se de um método de codificação de imagem que inclui: derivar um candidato para um estimador de vetor de movimento a partir de um vetor de movimento colocalizado (s1301); adicionar o candidato a uma lista (s1302); selecionar o estimador de vetor de movimento a partir da lista (s1303); e codificar um bloco atual e codificar um vetor de movimento atual (s1304), em que a derivação (s1301) inclui: derivar o candidato por um primeiro esquema de derivação no caso de determinar que cada um dentre uma imagem referência atual e uma imagem referência colocalizada é uma imagem referência de longo prazo; e derivar o candi-dato por um segundo esquema de derivação no caso de determinar que cada uma dentre a imagem referência atual e a imagem referência colocalizada é uma imagem referência de curto prazo.
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