Abstract:
A fabricating process of a structure with an embedded circuit is described as follows. Firstly, a substrate having an upper surface and a lower surface opposite to the upper surface is provided. Afterward, a dielectric layer is formed on the upper surface of the substrate. Next, a plating-resistant layer is formed on the dielectric layer. Then, the plating-resistant layer and the dielectric layer are patterned for forming an recess pattern on the dielectric layer. Subsequently, a conductive base layer is formed in the recess pattern by using a chemical method, and the plating-resistant layer is exposed by the conductive base layer. After that, the plating-resistant layer is removed.
Abstract:
The present invention is directed to non-lithographic patterning by laser (or similar-type energy beam) ablation, where the ablation system ultimately results in circuitry features that are relative free from debris induced over-plating defects (debris relating to the ablation process) and fully additive plating induced over-plating defects. Compositions of the invention include a circuit board precursor having an insulating substrate and a cover layer. The insulating substrate is made from a dielectric material and also a metal oxide activatable filler. The cover layer can be sacrificial or non-sacrificial and is used to remediate unwanted debris arising from the ablation process.
Abstract:
The present invention provides a process for embedding at least one layer of at least one metal trace in a silicone-containing polymer, comprising: a) applying a polymer layer on a substrate; b) thermally treating the polymer; c) irradiating at least one surface area of the polymer with a light beam emitted by an excimer laser; d) immersing the irradiated polymer in at least one autocatalytic bath containing ions of at least one metal, and metallizing the polymer; e) thermally treating the metallized polymer; f) applying a polymer layer covering the thermally treated metallized polymer; and g) thermally treating the metallized covered polymer. The present invention further provides a polymer layer comprising silicone containing oxide particles of SiO2, TiO2, Sb2O3, SnO2, Al2O3, ZnO, Fe2O3, Fe3O4, talc, hydroxyapatite or mixtures thereof and at least one metal trace embedded in said polymer layer. The present invention further provides a flexible electrode array comprising silicone containing oxide particles of SiO2, TiO2, Sb2O3, SnO2, A1203, ZnO, Fe2O3, Fe3O4, talc, hydroxyapatite or mixtures thereof and at least one metal trace embedded in said polymer layer.
Abstract translation:本发明提供了一种在含硅酮聚合物中嵌入至少一层至少一种金属痕迹的方法,包括:a)在基底上施加聚合物层; b)热处理聚合物; c)用由准分子激光器发射的光束照射所述聚合物的至少一个表面积; d)将经辐射的聚合物浸入至少一种含有至少一种金属的离子的自催化浴中,并对该聚合物进行金属化; e)热处理金属化聚合物; f)涂覆覆盖热处理的金属化聚合物的聚合物层; 和g)热处理金属化被覆聚合物。 本发明还提供一种聚合物层,其包含含硅氧烷的SiO 2,TiO 2,Sb 2 O 3, N 2,N 2 O 3,N 2,N 2 O 3, Fe 3 O 3,滑石,羟基磷灰石或其混合物,以及嵌入所述聚合物层中的至少一种金属迹线。 本发明还提供了一种柔性电极阵列,其包括含硅氧烷的SiO 2,TiO 2,Sb 2 O 3, / SUB>,SnO 2,Al 2 O 3,ZnO,Fe 2 O 3, Fe 3 O 3,滑石,羟基磷灰石或其混合物,以及嵌入所述聚合物层中的至少一种金属迹线。
Abstract:
Laminates for electronic components are produced by applying a polyimide resin precursor solution containing a palladium compound on a polyimide substrate, drying the resulting coating to form a polyimide resin precursor layer, irradiating this layer with ultraviolet rays in the presence of a hydrogen donor to form nuclei for primer plating, forming a metal primer layer by electroless plating, and converting the polyimide resin precursor layer into a polyimide resin layer through imidation by heating either after or before the formation of a surface plating layer. The invention provides laminates for electronic components which are extremely improved in adhesion to metal layers without impairing the characteristics inherent in the substrate and are excellent in insulating properties, and polyimide resin precursor resin solution to be used in the production of the laminates.
Abstract:
Multilayer dielectric structures particularly suitable for use in capacitors and having a plating dopant in an amount sufficient to promote plating of a conductive layer are provided, together with methods of forming such structures. Such dielectric structures show increased adhesion of subsequently applied conductive layers.
Abstract:
A process for fabricating a multilayer printed circuit board, in which interlayer adhesion of the layers is greatly enhanced by curing under superatmospheric pressure. The method generally includes depositing a first resin layer (12) onto a substrate (10), which is then patterned so as to cross-link a preselected portion of the resin layer (12). A second resin layer (18) is then deposited over the first resin layer (12), and then patterned to cross-link a portion thereof. Openings in the first and second resins are developed by removing those portions of the resins that were not cross-linked during patterning. Openings (26) in the second resin layer (18) provide access to the first resin layer (12) by subsequent chemical processes. The portions of the first (12) and second (18) resin layers cross-linked during patterning remain on the substrate (10) to form permanent dielectric layers. The first resin layer (12) preferably includes a filler catalytic to plating, thereby enabling direct plating of the first resin layer (12) to form metal features within the multilayer structure. The process yields a multilayer printed circuit board that exhibits increased interlayer adhesion subsequent to plating caused by curing the first and second resin under superatmospheric pressure.
Abstract:
A High-Density-Multi-Chip (HDMI) substrate structure (10) includes alternating conductor metallization (24,28,36,54,56) and insulating dielectric layers (14,38). The dielectric layers (14,38) are formed by curtain coating of ultraviolet photoimageable epoxy material, and the metallization (24,28,36,54,56) is formed by electroless plating or sputtering of copper. The dielectric layers (14,38) are photoimaged and developed to form via holes (16,40,44), and vias (18,42,46) are formed in the holes (16,40,44) by electroless copper plating. The metallization (24,28,36,54,56) can be formed in the same manner as the dielectric layers (14,38), or can alternatively be formed by subtractive photolithography using photoresist masks.
Abstract:
In a process for making a printed circuit, a method of forming a base for the circuit, including coating a cover foil with a decomposable film, then bonding the film to a carrier, and then removing the cover foil from the film.A protected base useful for making printed circuits, comprising a synthetic-resin-based carrier, a decomposable adhesive film bonded to the carrier, and a removable cover foil bonded to the film, the adhesive film containing catalyst effective for the electroless deposition of metal conductors.
Abstract:
A BLANK FOR THE PRODUCTION OF METALLIZED ARTICLES IS PROVIDED, WHICH COMPRISES AN INSULATING BASE WHICH IS CATALYTIC THROUGHOUT ITS INTERIOR TO THE RECEPTION OF ELECTROLESS METAL, AND A SURFACE ON SAID BASE HAVING SUPER-IMPOSED THEREON AND ADHERED THERETO A UNITARY THIN FILM OF METAL. IN ADDITION, METHODS FOR METALLIZING PLASTICS AND FORMING PLATED THROUGH HOLE PRINTED CIRCUIT BOARDS ARE ALSO PROVIDED.