公开(公告)号：US20180191091A1

公开(公告)日：2018-07-05

申请号：US15855676

申请日：2017-12-27

Applicant: LSIS CO., LTD.

Inventor： Youngkook KIM

IPC: H01R12/71 ,  H01H9/54 ,  H05K1/18 ,  H01R13/04 ,  H01R13/10

CPC classification number: H01R12/716 ,  H01H9/54 ,  H01H71/0228 ,  H01H71/08 ,  H01H71/123 ,  H01H71/128 ,  H01H71/7409 ,  H01H2071/086 ,  H01R13/04 ,  H01R13/10 ,  H01R29/00 ,  H05K1/18 ,  H05K2201/10045 ,  H05K2201/10189

Abstract: The present invention relates to an isolation mechanism of a controller for a direct current circuit breaker, which has a simple structure for isolation and connection manipulation. The isolation mechanism of a controller for a circuit breaker comprises a first connector that has a plurality of output terminals electrically connected to the controller and a plurality of input terminals detached from the output terminals for connecting an input electric power source; and a second connector that has a first connection position connected to the first connector and a second connection position rotated at 180° from the first connection position and connected to the first connector, and has a conductor wiring portion electrically connecting the output terminals with the input terminals at the first connection position and electrically disconnecting the output terminals from the input terminals at the second connection position.

公开(公告)号：US09686865B2

公开(公告)日：2017-06-20

申请号：US14745673

申请日：2015-06-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yun-Han Lee ,  Mark Shane Peng ,  Shyh-An Chi

IPC: H05K1/11 ,  H05K1/14 ,  H05K1/18 ,  H01L25/18 ,  H01L23/00 ,  H01L25/065 ,  H01L23/14 ,  H01L23/538

CPC classification number: H05K1/181 ,  H01L23/147 ,  H01L23/538 ,  H01L24/16 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/18 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2225/06565 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01L2924/1438 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/111 ,  H05K1/115 ,  H05K1/141 ,  H05K2201/10045 ,  H05K2201/10053 ,  H05K2201/10378 ,  H01L2924/00

Abstract: A package structure includes a networking unit including a plurality of switches/routers and a plurality of network interface units coupled to the plurality of switches/routers, and an interposer including a plurality of metal connections. The interposer is substantially free from functional elements built therein. A functional element is outside of, and bonded onto, the interposer, wherein the functional element is electrically coupled to the networking unit through the plurality of metal connections.

公开(公告)号：US20160179732A1

公开(公告)日：2016-06-23

申请号：US14581852

申请日：2014-12-23

Applicant: BELIMO Holding AG

Inventor： Peter Schmidlin ,  Silvio Grogg

IPC: G06F13/40 ,  G06F13/364 ,  G06F13/42

CPC classification number: G06F13/4068 ,  G05B2219/1204 ,  G05B2219/2208 ,  G06F13/364 ,  G06F13/4282 ,  H05K1/16 ,  H05K1/182 ,  H05K2201/10045

Abstract: A connecting device comprises housing, a board with electrical components, including at least one digital bus connection and an input/output section. It allows outsourcing of analogue and digital I/O from a connected device, e.g. an HVAC actuator control unit by decentralizing inputs and outputs.

Abstract translation: 连接装置包括壳体，具有电气部件的板，包括至少一个数字总线连接和输入/输出部分。 它允许从连接的设备外包模拟和数字I / O，例如。 通过分散输入和输出的HVAC执行器控制单元。

公开(公告)号：US20160125981A1

公开(公告)日：2016-05-05

申请号：US14931684

申请日：2015-11-03

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Hae In KIM ,  Jung Min NAM ,  Jea Hoon LEE ,  Young Key KIM

IPC: H01C1/14 ,  H01C17/065 ,  H01C17/28

CPC classification number: H01C1/14 ,  H01C1/01 ,  H01C7/003 ,  H01C17/281 ,  H05K1/181 ,  H05K3/3431 ,  H05K2201/10022 ,  H05K2201/10045 ,  Y02P70/611

Abstract: A resistor includes: a base substrate; a resistance layer disposed on one surface of the base substrate; first and second electrode layers disposed to be spaced apart from each other and covering portions of the resistance layer; and a third electrode layer disposed between the first and second electrode layers to be spaced apart from the first and second electrode layers and covering a portion of the resistance layer.

Abstract translation: 电阻器包括：基底; 电阻层，设置在所述基底基板的一个表面上; 第一和第二电极层设置成彼此间隔开并覆盖电阻层的部分; 以及第三电极层，设置在第一和第二电极层之间，与第一和第二电极层间隔开并覆盖电阻层的一部分。

公开(公告)号：US20160021753A1

公开(公告)日：2016-01-21

申请号：US14802139

申请日：2015-07-17

Applicant: IBIDEN CO., LTD.

Inventor： Mitsuhiro TOMIKAWA ,  Koji ASANO

IPC: H05K1/18 ,  H05K3/00 ,  H05K3/30 ,  H05K3/46 ,  H05K1/02 ,  H05K1/11

CPC classification number: H05K3/4697 ,  H01L21/568 ,  H01L2224/04105 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K1/0206 ,  H05K1/162 ,  H05K1/185 ,  H05K3/3436 ,  H05K3/4644 ,  H05K2201/10 ,  H05K2201/10045 ,  H05K2201/10416 ,  H01L2924/00014

Abstract: A circuit substrate includes a core substrate having a cavity penetrating through the substrate, a combined component accommodated in the cavity of the substrate, a first build-up layer laminated on first surface of the substrate and including an insulating layer such that the insulating layer is covering the cavity, a second build-up layer laminated on second surface of the substrate and including an insulating layer such that the insulating layer is covering the cavity, and a filling resin filling gap formed between the cavity and combined component accommodated in the cavity of the substrate. The combined component includes an electronic component and a metal block, the electronic component has terminal surface on side facing the first surface of the substrate, and the metal block is superposed to surface of the electronic component on the opposite side of the electronic component with respect to the terminal surface.

Abstract translation: 电路基板包括具有穿透基板的空腔的芯基板，容纳在基板的空腔中的组合部件，层叠在基板的第一表面上并且包括绝缘层的第一累积层，使得绝缘层为 覆盖空腔，层叠在基板的第二表面上的第二堆叠层，并且包括绝缘层，使得绝缘层覆盖空腔;以及填充树脂填充间隙，其形成在容纳在空腔中的空腔和组合部件之间 底物。 组合部件包括电子部件和金属块，电子部件具有面向基板的第一表面的端面，并且金属块与电子部件的相对侧的电子部件的表面重叠 到终端表面。

公开(公告)号：US20150305159A1

公开(公告)日：2015-10-22

申请号：US14440016

申请日：2013-10-25

Applicant: ROHM CO., LTD.

Inventor： Hiroki YAMAMOTO ,  Keishi WATANABE ,  Hiroshi TAMAGAWA

IPC: H05K1/18 ,  H05K1/11 ,  H05K1/16

CPC classification number: H01G4/30 ,  H01G2/06 ,  H01G4/005 ,  H01G4/228 ,  H01G4/232 ,  H01G4/40 ,  H01L22/14 ,  H01L22/20 ,  H01L23/5223 ,  H01L24/48 ,  H01L24/49 ,  H01L27/0629 ,  H01L27/0676 ,  H01L27/101 ,  H01L27/2409 ,  H01L28/40 ,  H01L29/66189 ,  H01L29/94 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/0002 ,  H05K1/111 ,  H05K1/162 ,  H05K1/18 ,  H05K1/181 ,  H05K3/3436 ,  H05K2201/10015 ,  H05K2201/10045 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/85399

Abstract: A chip capacitor according to the present invention includes a substrate, a pair of external electrodes formed on the substrate, a capacitor element connected between the pair of external electrodes, and a bidirectional diode connected between the pair of external electrodes and in parallel to the capacitor element. Also, a circuit assembly according to the present invention includes the chip capacitor according to the present invention and a mounting substrate having lands, soldered to the external electrodes, on a mounting surface facing a front surface of the substrate.

Abstract translation: 根据本发明的片状电容器包括衬底，形成在衬底上的一对外部电极，连接在一对外部电极之间的电容器元件和连接在该对外部电极之间并与电容器并联的双向二极管 元件。 此外，根据本发明的电路组件包括根据本发明的片状电容器和具有焊盘焊接到外部电极的焊盘的安装基板，在与衬底的前表面相对的安装表面上。

公开(公告)号：US08208266B2

公开(公告)日：2012-06-26

申请号：US12119800

申请日：2008-05-13

Applicant: Gheorghe Korony

Inventor： Gheorghe Korony

IPC: H05K1/16 ,  H05K3/00

CPC classification number: H01P1/20 ,  H01L2224/48091 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/16 ,  H05K3/0052 ,  H05K3/403 ,  H05K2201/0317 ,  H05K2201/09154 ,  H05K2201/10045 ,  Y10T29/49155 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Shaped integrated passive devices and corresponding methodologies relate to construction and mounting of shaped passive devices on substrates so as to provide both mechanical and electrical connection. Certain components and component assemblies are associated with the implementation of surface mountable devices. Specially shaped integrated passive device are capable of providing simplified mounting on and simultaneous connection to selected electrical pathways on a printed circuit board or other mounting substrate. Shaped, plated side filter devices have plated sides which provide both mounting and grounding/power coupling functions. Thin film filters may be constructed on silicon wafers, which are then diced from the top surface with an angular dicing saw to produce a shaped groove in the top surface. The groove may be v-shaped or other shape, and is then plated with a conductive material. Individual pieces are separated by grinding the back surface of the wafer down to where the grooves are intercepted. The plated grooves serve as ground or power connection points for the filter circuit. The metallized slopes of the plated grooves are used in securing the individual pieces to a mounting surface, by soldering or using conductive epoxy.

Abstract translation: 形状的集成无源器件和相应的方法涉及在基底上的成形无源器件的结构和安装，以便提供机械和电连接。 某些组件和组件组件与表面可安装设备的实现相关联。 特殊形状的集成无源器件能够简化安装在印刷电路板或其他安装基板上的选定电路上并同时连接。 成型的电镀侧过滤器装置具有电镀侧面，其提供安装和接地/电力耦合功能。 薄膜过滤器可以构造在硅晶片上，然后用角切割锯从顶表面切割，以在顶表面中产生成形凹槽。 凹槽可以是v形或其他形状，然后用导电材料镀覆。 通过将晶片的后表面向下研磨到凹槽被截取的地方分开各个片段。 电镀槽用作滤波电路的接地或电源连接点。 电镀槽的金属化斜坡用于通过焊接或使用导电环氧树脂将各个片固定到安装表面。

公开(公告)号：US20100323479A1

公开(公告)日：2010-12-23

申请号：US12868422

申请日：2010-08-25

Applicant: Erich Syri ,  Gerold Gruendler ,  Juergen Hoegerl ,  Thomas Killer ,  Volker Strutz

Inventor： Erich Syri ,  Gerold Gruendler ,  Juergen Hoegerl ,  Thomas Killer ,  Volker Strutz

IPC: H01L21/56

CPC classification number: H01L25/165 ,  H01L21/563 ,  H01L23/293 ,  H01L2224/73203 ,  H05K1/181 ,  H05K3/305 ,  H05K2201/10045 ,  H05K2201/10977 ,  Y02P70/613

Abstract: A semiconductor component including: a substrate, at least one semiconductor chip arranged on the substrate and at least one passive device likewise arranged on the substrate. The passive device is mounted with its underside on the substrate. The semiconductor component further includes an interspace disposed between the underside of the passive device and the substrate. The interspace is filled with an underfilling material. In order to avoid the solder pumping effect, the upper side and the lateral sides of the passive device are also embedded in a plastic compound.

Abstract translation: 一种半导体部件，包括：衬底，布置在衬底上的至少一个半导体芯片和同样布置在衬底上的至少一个无源器件。 无源器件的底面安装在基板上。 半导体部件还包括设置在无源器件的下侧和衬底之间的间隙。 该间隙填充有底部填充材料。 为了避免焊料泵送效应，无源器件的上侧和侧面也嵌入塑料化合物中。

公开(公告)号：US07804178B2

公开(公告)日：2010-09-28

申请号：US11748135

申请日：2007-05-14

Applicant: Erich Syri ,  Gerold Gruendler ,  Juergen Hoegerl ,  Thomas Killer ,  Volker Strutz

Inventor： Erich Syri ,  Gerold Gruendler ,  Juergen Hoegerl ,  Thomas Killer ,  Volker Strutz

IPC: H01L23/02 ,  H01L29/40

CPC classification number: H01L25/165 ,  H01L21/563 ,  H01L23/293 ,  H01L2224/73203 ,  H05K1/181 ,  H05K3/305 ,  H05K2201/10045 ,  H05K2201/10977 ,  Y02P70/613

Abstract: A semiconductor component including: a substrate, at least one semiconductor chip arranged on the substrate and at least one passive device likewise arranged on the substrate. The passive device is mounted with its underside on the substrate. The semiconductor component further includes an interspace disposed between the underside of the passive device and the substrate. The interspace is filled with an underfilling material. In order to avoid the solder pumping effect, the upper side and the lateral sides of the passive device are also embedded in a plastic compound.

Abstract translation: 一种半导体部件，包括：衬底，布置在衬底上的至少一个半导体芯片和同样布置在衬底上的至少一个无源器件。 无源器件的底面安装在基板上。 半导体部件还包括设置在无源器件的下侧和衬底之间的间隙。 该间隙填充有底部填充材料。 为了避免焊料泵送效应，无源器件的上侧和侧面也嵌入塑料化合物中。

公开(公告)号：US20090189269A1

公开(公告)日：2009-07-30

申请号：US12019413

申请日：2008-01-24

Applicant: Lap-Wai Lydia Leung ,  Chang Hwa Chung ,  Jie Liu ,  Chi Kuen Leung ,  Chiu Lun Chan

Inventor： Lap-Wai Lydia Leung ,  Chang Hwa Chung ,  Jie Liu ,  Chi Kuen Leung ,  Chiu Lun Chan

IPC: H05K1/00 ,  H01L23/48

CPC classification number: H05K1/0243 ,  H01L23/3121 ,  H01L23/5387 ,  H01L23/66 ,  H01L24/28 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/48195 ,  H01L2924/00014 ,  H01L2924/078 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/3011 ,  H05K1/189 ,  H05K3/284 ,  H05K2201/10045 ,  H05K2201/1006 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A electronic circuit package having a flexible substrate with metals layers on one or more of its surfaces forming a wiring pattern and/or surface mount bonding pads. Passive electronic components are integrated onto component packages that are mounted to the flexible substrate and electrically connected with the wiring pattern or bonding pad. An active electronic device is mounted on the flexible substrate or bonding pad.

Abstract translation: 一种电子电路封装，其具有在其一个或多个表面上具有金属层的柔性基板，形成布线图案和/或表面贴装焊盘。 无源电子部件被集成到组件封装上，其安装到柔性衬底并与布线图案或焊盘电连接。 有源电子器件安装在柔性基底或接合垫上。