公开(公告)号：WO1997044728A1

公开(公告)日：1997-11-27

申请号：PCT/US1997001044

申请日：1997-01-23

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  BARTKOWIAK, John, G. ,  LYNCH, Thomas, W.

IPC: G06F09/38

CPC classification number: G06F9/3885 ,  G06F9/30145 ,  G06F9/3824 ,  G06F9/3826 ,  G06F9/3893 ,  G06F9/3897

Abstract: A processor employing a dynamically configurable bus interconnect is provided. The interconnect routes data between functional units and memories included within the processor in response to an instruction field. As opposed to a particular hard-wired interconnect, the dynamically variable interconnect may be modified to form an optimum interconnect for the particular algorithm being executed. Still further, the interconnect may be modified between several configurations during the execution of the algorithm, as often as each clock cycle. Because an instruction field is used to directly specify the configuration of the interconnect during execution of that instruction, control over the interconnect is afforded to the programmer writing the code which implements a particular algorithm.

Abstract translation: 提供了采用可动态配置的总线互连的处理器。 该互连响应于指令字段，在包括在处理器内的功能单元和存储器之间路由数据。 与特定的硬连线互连相反，动态可变互连可以被修改以形成用于正在执行的特定算法的最佳互连。 此外，可以在执行算法期间在多个配置之间修改互连，如同每个时钟周期一样。 由于指令字段用于在执行该指令期间直接指定互连的配置，所以可以通过编程器编写实现特定算法的代码来控制互连。

公开(公告)号：WO1997043782A1

公开(公告)日：1997-11-20

申请号：PCT/US1996019801

申请日：1996-12-03

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  MAY, Charles, E. ,  DAWSON, Robert

IPC: H01L21/321

CPC classification number: H01L21/0331 ,  G03F7/09 ,  H01L21/32139

Abstract: A method for patterning an underlying substrate includes forming a layer of spin-on glass over the substrate, forming a layer of photoresist over the spin-on glass, patterning the photoresist, patterning the spin-on glass using the photoresist as a mask, and patterning the substrate by applying an etch using the spin-on glass as a hard mask wherein the etch removes the photoresist and partially removes the spin-on glass. In one embodiment, the spin-on glass is patterned by applying a fluorine-based plasma, an aluminium-based substrate is patterned by applying a chlorine-based plasma in which an etch selectivity of the substrate to the spin-on glass is at least 10:1, and the spin-on glass is removed by applying another fluorine-based plasma.

Abstract translation: 用于图案化下面的衬底的方法包括在衬底上形成旋涂玻璃层，在旋涂玻璃上形成光致抗蚀剂层，图案化光致抗蚀剂，使用光致抗蚀剂作为掩模图案化旋涂玻璃，以及 通过使用旋涂玻璃作为硬掩模施加蚀刻图案化衬底，其中蚀刻去除光致抗蚀剂并部分地去除旋涂玻璃。 在一个实施例中，通过施加氟基等离子体来对旋涂玻璃进行图案化，通过施加氯基等离子体对基于铝的基板进行图案化，其中基板对旋涂玻璃的蚀刻选择性至少为 如图10：1所示，通过施加另一种氟基等离子体去除旋涂玻璃。

公开(公告)号：WO1997043719A1

公开(公告)日：1997-11-20

申请号：PCT/US1996018717

申请日：1996-11-22

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  DEY, Shankar ,  BUI, Dinh, Kim ,  ZHAO, Ming

IPC: G06F13/40

CPC classification number: G06F13/4022

Abstract: A microprocessor system having a first read path from memory and a second read path from peripheral units and an isolation buffer to isolate the first read path from the second read path. The system also has a first write path to memory and a second write path to peripheral units and an isolation buffer to isolate the first write path from the second write path. The isolation buffers also isolate the write paths from the read paths. Also included is a monitoring path between the peripherals and an external bus to allow program monitoring of data in the peripheral units.

Abstract translation: 具有来自存储器的第一读取路径和来自外围单元的第二读取路径和隔离缓冲器以将第一读取路径与第二读取路径隔离的微处理器系统。 该系统还具有到存储器的第一写入路径和到外围单元的第二写入路径以及隔离缓冲器以将第一写入路径与第二写入路径隔离。 隔离缓冲区还将写入路径与读取路径隔离开来。 还包括外围设备和外部总线之间的监控路径，以便对外围设备中的数据进行程序监控。

公开(公告)号：WO1997042569A1

公开(公告)日：1997-11-13

申请号：PCT/US1997001183

申请日：1997-01-24

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  MILLS, Andrew ,  IRETON, Mark, A. ,  LYNCH, Thomas, W.

IPC: G06F09/42

CPC classification number: G06F9/3885 ,  G06F9/30145 ,  G06F9/4486

Abstract: A microprocessor including an instruction decode unit configured to detect a DSP call instruction is provided. The DSP call instruction is indicative of a call to a subroutine which performs a DSP function. Detected DSP call instructions are routed to a DSP which executes a routing performing the corresponding function. Subsequent to the DSP completing execution of the routine, the microprocessor continues execution at the instruction subsequent to the DSP call instruction. If a DSP is not included in the computer system, the DSP call instruction is executed in a manner similar to a subroutine call instruction. The microprocessor subsequently executes a corresponding routine which performs the DSP function.

Abstract translation: 提供了一种微处理器，包括被配置为检测DSP调用指令的指令解码单元。 DSP调用指令表示对执行DSP功能的子程序的调用。 检测到的DSP调用指令被路由到执行执行相应功能的路由的DSP。 在DSP完成程序的执行之后，微处理器在DSP调用指令之后的指令处继续执行。 如果DSP不包括在计算机系统中，则以与子程序调用指令类似的方式执行DSP调用指令。 微处理器随后执行执行DSP功能的相应程序。

公开(公告)号：WO1997042565A1

公开(公告)日：1997-11-13

申请号：PCT/US1997002330

申请日：1997-02-18

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  BARTKOWIAK, John, G.

IPC: G06F09/30

CPC classification number: G06F9/30141 ,  G06F9/3885

Abstract: A DSP including a register file connected to data memories and functional units is provided. Functional units read operands from the register file and store results into the register file. Various register storage locations from communicative links between the functional units and the memories, in accordance with a particular code sequence being executed by the DSP. Because each functional unit has an independent path to the register file, each functional unit may provide results to the register file concurrently. Additionally, having multiple register storage locations which are accessible to any functional unit permits flexibility in the operation of the DSP. Multiple register storage locations may be used by the same functional unit, allowing program code to be more optimized by storing values for later use in one of the register storage locations, as opposed to storing values in the data memories. The register file essentially provides a buffer between the functional units, and between the functional units and memory.

Abstract translation: 提供了包括连接到数据存储器和功能单元的寄存器文件的DSP。 功能单元从寄存器文件中读取操作数，并将结果存储到寄存器文件中。 根据由DSP执行的特定代码序列，功能单元和存储器之间的通信链路的各种寄存器存储位置。 因为每个功能单元具有到寄存器文件的独立路径，所以每个功能单元可以同时向寄存器文件提供结果。 此外，具有可由任何功能单元访问的多个寄存器存储单元允许DSP的操作的灵活性。 多个寄存器存储位置可以由相同的功能单元使用，通过将值存储在一个寄存器存储位置中，以便将数据存储在数据存储器中，从而允许程序代码被更优化以供稍后使用。 寄存器文件本质上在功能单元之间以及功能单元和存储器之间提供缓冲器。

公开(公告)号：WO1997041597A1

公开(公告)日：1997-11-06

申请号：PCT/US1997003255

申请日：1997-03-03

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  HAUSE, Fred, N. ,  BANDYOPADHYAY, Basab ,  FULFORD, H., Jim ,  DAWSON, Robert ,  MICHAEL, Mark, W. ,  BRENNAN, William, S.

IPC: H01L21/762

CPC classification number: H01L21/76205 ,  H01L21/76229

Abstract: An isolation technique is provided for improving the overall planarity of isolation regions relative to adjacent active area silicon mesas. The isolation process results in a trench formed in field regions immediately adjacent the active regions. The trench, however, does not extend entirely across the field region. By preventing large area trenches, substantial dielectric fill material and the problems of subsequent planarization of that fill material is avoided. Accordingly, the present isolation technique does not require conventional fill dielectric normally associated with a shallow trench process. While it achieves the advantages of forming silicon mesas, the present process avoids having to rework dielectric surfaces in large area field regions using conventional sacrificial etchback, block masking and chemical-mechanical polishing. The improved isolation technique hereof utilizes trenches of minimal width etched into the silicon substrate at the periphery of field regions, leaving a field mesa. A field dielectric, preferably oxide, is formed upon the field mesa and fills trenches between the field mesa and active mesas, leaving a substantially planar field dielectric commensurate with the upper surface of adjacent active mesas.

Abstract translation: 提供隔离技术用于改善隔离区域相对于相邻有源区硅台面的整体平面度。 隔离过程导致在紧邻有源区域的场区域中形成沟槽。 然而，这个沟槽并不完全穿过田野区域。 通过防止大面积沟槽，避免了大量的介电填充材料以及该填充材料随后的平坦化问题。 因此，本发明的隔离技术不需要通常与浅沟槽工艺相关联的常规填充电介质。 虽然它实现了形成硅台面的优点，但是本方法避免了使用常规的牺牲回蚀，块掩模和化学机械抛光在大面积场区域中的电介质表面的返修。 其改进的隔离技术利用在场区周边蚀刻到硅衬底中的最小宽度的沟槽，留下场台面。 在场台面上形成场电介质，优选氧化物，并填充场台面和有源台面之间的沟槽，留下与相邻活性台面的上表面相当的基本上平面的场电介质。

公开(公告)号：WO1997039479A1

公开(公告)日：1997-10-23

申请号：PCT/US1997002502

申请日：1997-02-18

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  BRENNAN, William, S. ,  DAWSON, Robert ,  HAUSE, Fred, N. ,  BANDYOPADHYAY, Basab ,  FULFORD, H., Jim, Jr. ,  MICHAEL, Mark, W.

IPC: H01L21/3105

CPC classification number: H01L21/76819 ,  H01L21/31055 ,  H01L21/76229

Abstract: An isolation technique is provided for improving the overall planarity of trench isolation regions relative to adjacent silicon mesas. The isolation process results in a spaced plurality of field dielectric having an upper surface substantially coplanar with each other and with adjacent silicon mesa upper surfaces. The isolation process is thereby a planarization process used with the shallow trench technique, wherein etch-enhancing ions are forwarded into the fill dielectric at upper elevational regions of that dielectric. When subjected to a subsequent etchant, the dopants cause the higher elevational regions to be removed at a faster rate than the lower elevational regions. Thus, selective placement of dopants and etch removal pre-conditions the fill dielectric upper surface to a more planar surface globally across the entire wafer. After etch removal predominantly at the higher elevational regions, the remaining fill dielectric upper surface is removed to a level commensurate with the upper surface of silicon mesas thereby producing separate field dielectrics interposed between silicon mesas. The field dielectrics, regardless of their lateral area, each have a substantially planar upper surface at or slightly below the adjoining silicon mesas. By producing planar field dielectric upper surfaces, various problems of non-planarity are removed from the thin films which are thereafter formed on the field dielectrics or between the field dielectrics and silicon mesas.

Abstract translation: 提供隔离技术用于改善沟槽隔离区域相对于相邻硅台面的整体平面度。 隔离过程导致间隔开的多个场电介质，其具有彼此基本上共面的上表面和相邻的硅台面上表面。 因此，隔离过程是与浅沟槽技术一起使用的平坦化工艺，其中将蚀刻增强离子转移到该电介质的上部高度区域的填充电介质中。 当经受后续蚀刻剂时，掺杂剂导致以比较低的高度区域更快的速率去除较高的高度区域。 因此，掺杂剂的选择性放置和蚀刻去除预先将填充电介质上表面全局地横跨整个晶片进行预处理。 在主要在较高的高度区域进行蚀刻去除之后，剩余的填充电介质上表面被去除到与硅台面的上表面相当的水平，从而产生介于硅台面之间的单独的场电介质。 场电介质，无论它们的横向面积如何，每个在相邻的硅台面处或稍低于相邻的硅台面处都具有基本平坦的上表面。 通过产生平面场电介质上表面，从形成在场电介质上或在场电介质和硅台面之间的薄膜中去除了非平面性的各种问题。

公开(公告)号：WO1997039404A1

公开(公告)日：1997-10-23

申请号：PCT/US1997001184

申请日：1997-01-24

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  IRETON, Mark, A.

IPC: G06F09/302

CPC classification number: G06F9/30014 ,  G06F7/48 ,  G06F7/49921 ,  G06F9/30036 ,  G06F9/3885 ,  G06F2207/382 ,  G06F2207/3828

Abstract: An execute unit including an integer operation circuit is provided. The integer operation circuit is dynamically configurable to operate upon many different widths of operands. A single pair of operands may be operated upon, wherein the width of the operands is the maximum width the integer operation circuit is configured to handle. Alternatively, multiple pairs of operands having narrower widths may be operated upon. The instruction being executed defines the width of the operands and therefore the number of operands. Wide operand operations are performed at a rate of one per instruction, and a rate of more than one instruction is achieved for narrow operands. The same integer operation circuitry is employed to perform both narrow and wide integer operations. Silicon area consumed by the integer operation circuitry may be reduced as compared to a wide integer operation circuit and multiple narrow integer operation circuits.

Abstract translation: 提供包括整数运算电路的执行单元。 整数运算电路是动态配置的，可以操作许多不同宽度的操作数。 可以操作一对操作数，其中操作数的宽度是整数运算电路被配置为处理的最大宽度。 或者，可以操作具有较窄宽度的多对操作数。 正在执行的指令定义了操作数的宽度，因此定义了操作数的数量。 以每个指令的速率执行宽操作数操作，并且对于窄操作数实现多于一条指令的速率。 采用相同的整数运算电路来执行窄整数运算和宽整数运算。 与宽整数运算电路和多个窄整数运算电路相比，由整数运算电路消耗的硅面积可以减小。

公开(公告)号：WO1997038517A1

公开(公告)日：1997-10-16

申请号：PCT/US1997001043

申请日：1997-01-23

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  SCHOPFER, Walter, S.

IPC: H04M03/18

CPC classification number: H04M1/745 ,  C08J9/144 ,  C08J9/149 ,  C08J2203/14 ,  C08J2203/142 ,  C08J2203/18 ,  C08J2375/04 ,  H04M3/18

Abstract: A power cross detection circuit that detects a power cross condition on the ring and tip lines of a telephone system. The power cross detection circuit senses a loop current flowing across a ring feed resistor (Rgfd 1), as well as a loop voltage at a first node (2) and a second node (4) at opposite ends of the ring feed resistor. Based on these sensed values, a threshold voltage for detecting a power cross condition can be adjusted to detect the power cross condition at a lower voltage value.

Abstract translation: 电力交叉检测电路，其检测电话系统的环线和末端线路上的电力交叉状态。 电力交叉检测电路感测流过环馈电电阻器（Rgfd 1）的回路电流以及在环馈电电阻器的相对端的第一节点（2）和第二节点（4）处的回路电压。 基于这些感测值，可以调整用于检测功率交叉条件的阈值电压，以在较低电压值下检测功率交叉条件。

公开(公告)号：WO1997036238A1

公开(公告)日：1997-10-02

申请号：PCT/US1997005020

申请日：1997-03-28

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  LEE, Sherman ,  MACDONALD, James, R. ,  WISOR, Michael, T.

IPC: G06F12/14

CPC classification number: G06F21/73 ,  G06F11/006 ,  G06F12/1408 ,  G06F2207/7219 ,  G06F2211/007

Abstract: A method and apparatus for software to access a microprocessor serial number. Provision of the serial number allows the manufacturer better control over its product and also permits software vendors to register their products. The serial number is encrypted using a pair of encryption keys to prevent unauthorized changes. At least one of the encryption keys is itself encoded to prevent unauthorized access, while permitting software to access the serial number.

Abstract translation: 一种用于访问微处理器序列号的软件的方法和装置。 提供序列号允许制造商更好地控制其产品，并允许软件供应商注册其产品。 使用一对加密密钥对序列号进行加密，以防止未经授权的更改。 至少有一个加密密钥本身被编码以防止未经授权的访问，同时允许软件访问序列号。