公开(公告)号：JP2003186818A

公开(公告)日：2003-07-04

申请号：JP2002252295

申请日：2002-08-30

Applicant: ST MICROELECTRONICS INC

Inventor： LIN WEN

IPC: G06F13/10 ,  G06F3/06 ,  G06F13/00 ,  G06F13/28

Abstract: PROBLEM TO BE SOLVED: To provide a system architecture which improves the efficiency of data processing capability in an integrated system. SOLUTION: A computer system has a processor with a data/control bus interface. A data/control bus implements one or more device communication channels. A data memory is coupled to the processor and a mass storage device having an interface for communicating mass storage transaction, is provided. A controller having a memory interface is coupled to the data memory and a mass storage interface coupled to the mass storage device's interface and operable to conduct mass storage transactions between the data memory and the mass storage device. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2003179879A

公开(公告)日：2003-06-27

申请号：JP2002252635

申请日：2002-08-30

Applicant: ST MICROELECTRONICS INC

Inventor： HADDAD SEMIR S ,  DHILLON AMANDEEP K

IPC: H04N5/93 ,  G11B20/10 ,  G11B20/12 ,  H04J3/00 ,  H04N5/76 ,  H04N5/781 ,  H04N5/85 ,  H04N5/92 ,  H04N7/173 ,  H04N7/26 ,  H04N9/804 ,  H04N19/00 ,  H04N21/41 ,  H04N21/43 ,  H04N21/434 ,  H04N21/438 ,  H04N21/44 ,  H04N7/24

Abstract: PROBLEM TO BE SOLVED: To provide an enhanced technique for synchronizing a video stream with an audio stream within a reproduction period of a recorded television program. SOLUTION: This MPEG decoder comprises: 1) a packetized elementary stream (PES) interface for receiving a plurality of packetized elementary streams associated with a single video program, 2) a presentation time stamp (PTS) detection circuit for detecting presentation time stamps in the packetized elementary streams and extracting the presentation time stamps therefrom, and 3) a selection circuit for selecting presentation time stamps associated with a first one of the plurality of packetized elementary streams transmitting the selected presentation time stamps to a clock generating circuit, wherein the clock generating circuit generates a first reference clock used by a first decoder to decode the first packetized elementary stream. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2003158719A

公开(公告)日：2003-05-30

申请号：JP2002252744

申请日：2002-08-30

Applicant: ST MICROELECTRONICS INC

Inventor： HADDAD SEMIR S

IPC: H04N5/92 ,  H04J3/00 ,  H04N5/00 ,  H04N5/76 ,  H04N7/24 ,  H04N7/58 ,  H04N9/79 ,  H04N9/804 ,  H04N9/806 ,  H04N9/82 ,  H04N19/00 ,  H04N21/4147 ,  H04N21/43 ,  H04N21/433 ,  H04N21/434

Abstract: PROBLEM TO BE SOLVED: To provide a video data stream multiplexing system for multiplex packeted basic stream in a digital video recorder (DVR). SOLUTION: The video data stream multiplexing system for multiplexing the packeted basic stream in the digital video recorder (DVR), the method for operating the same and a multiplexed program stream are provided. The system relates to the DVR. This system operates to multiplex the packeted basic stream to the multiplexed program stream, and comprises a PES packet of the different size from that of the packeted basic stream. This system comprises (1) a header for receiving the PES packet in a memory buffer, (2) a payload for reformatting to at least one fixed size program packet for defining the content of the payload, and (3) for operating to relate several of at least one fixed size program packets into the multiplexed program stream.

公开(公告)号：JP2003133427A

公开(公告)日：2003-05-09

申请号：JP2002156788

申请日：2002-05-30

Applicant: ST MICROELECTRONICS INC

Inventor： THOMAS DANIELLE A

IPC: H01L21/822 ,  H01L27/04 ,  H01L49/00 ,  H03H3/007 ,  H03H9/24

Abstract: PROBLEM TO BE SOLVED: To provide a technique for integrating miniature resonator in an integrated circuit chip as a part of a semiconductor manufacturing process. SOLUTION: A cantilevered beam is formed in a cavity to an accurate length by isotropically etching a fast-etching material, such as hydrogen sillsquioxane. The cavity is initially filled with a slow-etching material. The selectivity of the etch rates of the material within the cavity relative to the material defining the walls of the cavity permits accurate control of the length of a free end of the cantilevered beam. The resonant frequency of the cantilevered beam can be tuned to a narrow predetermined range by laser trimming.

公开(公告)号：JP2002232422A

公开(公告)日：2002-08-16

申请号：JP2001309523

申请日：2001-10-05

Applicant: ST MICROELECTRONICS INC

Inventor： HVOSTOV HARRY ,  FUNG ANTHONY

IPC: H04L12/24 ,  H04L29/06

Abstract: PROBLEM TO BE SOLVED: To provide a method for permitting a client to speedily and efficiently access a function installed in a server interface. SOLUTION: The method for managing client server communication is provided. The function and an interface method are supplied to a server with the method. Reference to the interface method is provided to the client and the request of the client is processed by invoking the interface method on the server via reference. Ideally, the interface method is implemented by providing the server with the table of a pointer to the function and providing the client with reference to the table of the pointer.

公开(公告)号：JP2002208273A

公开(公告)日：2002-07-26

申请号：JP2001400099

申请日：2001-12-28

Applicant: ST MICROELECTRONICS INC

Inventor： RICODEAU FRANCOIS PIERRE

IPC: G11C11/404 ,  G11C11/4074 ,  G11C11/409

Abstract: PROBLEM TO BE SOLVED: To provide a device for pumping a memory cell in a memory and a method therefor. SOLUTION: Voltage on a memory cell is pumped (up or down), thereby, voltage stored in a memory cell is increased (upper than a voltage value of logic 1) or decreased (lower than a voltage value of logic 0), also, voltage difference increased on a bit line is given during a read-out operation period after that of the memory cell. When voltage of logic 1 or 0 is coupled to a first plate for storing, a second plate is held at lower or higher voltage respectively (suitably, voltage being a complementary logic value of a stored value). Voltage on the second plate is raised or dropped correspondingly after a word line was non-activated (thereby, a memory cell is cutoff from a bit line, a logic 1 voltage value or a logic 0 voltage value is stored). The second plate is raised or dropped to pre-charge voltage and balancing voltage (normally, Vdd/2). That is, voltage stored in the memory cell is pumped to higher voltage (when logic 1 is stored) or lower voltage (when logic 0 is stored).

公开(公告)号：JP2002198503A

公开(公告)日：2002-07-12

申请号：JP2001306639

申请日：2001-10-02

Applicant: ST MICROELECTRONICS INC

Inventor： THOMAS DANIELLE A ,  THOMAS GILLES E

IPC: H01L27/14 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/082 ,  H01L27/146 ,  H01L29/732 ,  H01L31/10

Abstract: PROBLEM TO BE SOLVED: To provide an integrated circuit device having a photodetector and a method of manufacturing the circuit device. SOLUTION: In the integrated circuit device, the photodetector is integrated with a bipolar transistor containing a high-speed vertical NPN transistor having polysilicon emitter on a single semiconductor chip. The photodetector has a nitride silicon layer which works as a reflection preventing film. The nitride silicon layer and oxide layers on both sides of the silicon layer insulate the end section of the polysilicon emitter from a transistor area under the emitter. Consequently, parasitic capacitances are minimized and, at the same time, a high-frequency response is achieved.

公开(公告)号：JP2002140231A

公开(公告)日：2002-05-17

申请号：JP2001269802

申请日：2001-09-06

Applicant: ST MICROELECTRONICS INC

Inventor： FLAKE LANCE L ,  FELDMAN TIMOTHY R

IPC: G06F3/06 ,  G06F12/08

Abstract: PROBLEM TO BE SOLVED: To provide a method and a system for using cache memory management based on extents. SOLUTION: When caching data in a memory, a host device and a storage in a communicating state with the memory are prepared, an extent record related to the memory is prepared, a storage access request is received from the host device, and at least one status field value inside the extent record is changed in response to the access request from the host device.

公开(公告)号：JP2002117002A

公开(公告)日：2002-04-19

申请号：JP2001276394

申请日：2001-09-12

Applicant: ST MICROELECTRONICS INC

Inventor： GARY SONYA ,  TYGER KAREN

IPC: G06F13/362 ,  G06F3/06

Abstract: PROBLEM TO BE SOLVED: To provide software, a system, and a device which make it possible to efficiently share peripheral units of a multiprocessor disk controller. SOLUTION: This disk drive controller has multiple processors and multiple common-use type peripheral units. A common-use type bus couples the peripheral units with the processors. A bi-directional multiplexer selectively couples multiple processors with the common-use type bus in response to an OWNER signal. A set of peripheral common-use registers is provided and a 1st member of this set has entries relating to the multiple peripheral units and has a state value representing which of the processors owns a currently related peripheral unit.

公开(公告)号：JP2002109874A

公开(公告)日：2002-04-12

申请号：JP2001220160

申请日：2001-07-19

Applicant: ST MICROELECTRONICS INC

Inventor： SAFI ROOZBEH

IPC: G11C7/00 ,  G06F5/06 ,  G06F5/12 ,  G06F5/14 ,  G06F12/06

Abstract: PROBLEM TO BE SOLVED: To provide an improved technique deciding the number of empty memory positions in a FIFO memory device. SOLUTION: This FIFO memory device is provided with plural pieces of memory positions having sequential binary addresses, a write address pointer for sequentially making access to the memory positions for writing the data, and a read address pointer for sequentially making access to the memory positions for reading the data. According to this invention, an inverted write binary address of the write address pointer is added to the read binary address of the read address pointer, and 1 is added thereto, and also the most significant bit(MSB) is destroyed to decide the number of the empty memory positions.