公开(公告)号：KR100481197B1

公开(公告)日：2005-04-13

申请号：KR1020020030020

申请日：2002-05-29

Applicant: 전자부품연구원

Inventor： 박성대 ,  이영신 ,  박종철

IPC: H01F41/02

Abstract: 본 발명은 내장형 세라믹 인덕터의 제조방법에 관한 것으로, 사진식각 공정을 수행하여 정밀한 인덕터 패턴을 그린시트 상부에 형성하고, 이 그린시트를 적층 및 소성하여 신뢰성이 우수한 인덕터가 내장된 세라믹 적층 소자를 제조함으로써, 고주파 모듈의 적용시 모듈의 신뢰성을 향상시킬 수 있는 효과가 발생한다.
더불어, 사진식각 공정으로 선폭이 작은 인덕터를 형성할 수 있어, 내장형 인덕터를 갖는 세라믹 적층 소자 및 고주파 모듈을 소형화시킬 수 있는 효과가 발생한다.

公开(公告)号：KR1020050000183A

公开(公告)日：2005-01-03

申请号：KR1020030040778

申请日：2003-06-23

Applicant: 전자부품연구원

Inventor： 박성대 ,  조현민 ,  강남기 ,  김진태 ,  이해영 ,  박종철

IPC: H01L23/28

CPC classification number: H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014

Abstract: PURPOSE: A packaging device of a high frequency communication module and a manufacturing method thereof are provided to reduce high frequency parasitic inductance caused by a bonding wire by forming parallel capacitance using a double metal film structure under a feeding line. CONSTITUTION: A first sheet structure(13) with a pair of first metal terminals(12) is provided. A second sheet structure(23) with a pair of second metal terminals(22) is formed on the first sheet structure. A third sheet structure(33) with a feeding line(32) is formed on the second sheet structure. At this time, a double metal film structure made of the first and second metal terminals is completed under the feeding line. A fourth sheet structure(43) is formed on the third sheet structure. The first to fourth sheet structure are ceramic green sheets.

Abstract translation: 目的：提供一种高频通信模块的封装装置及其制造方法，以通过在馈电线路下使用双金属膜结构形成并联电容来降低由接合线引起的高频寄生电感。 构成：提供具有一对第一金属端子（12）的第一片状结构（13）。 具有一对第二金属端子（22）的第二片状结构（23）形成在第一片状结构上。 具有馈电线（32）的第三片结构（33）形成在第二片结构上。 此时，在馈电线下完成由第一和第二金属端子制成的双金属膜结构。 在第三片结构上形成第四片结构（43）。 第一至第四片结构是陶瓷生片。

公开(公告)号：KR1020040095379A

公开(公告)日：2004-11-15

申请号：KR1020030026651

申请日：2003-04-28

Applicant: 전자부품연구원

Inventor： 박성대 ,  서재옥 ,  조현민 ,  김진태 ,  이해영 ,  강남기

IPC: H01L21/60

CPC classification number: H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/16152 ,  H01L2924/00014

Abstract: PURPOSE: A packaging apparatus of an RF communication module and a fabricating method thereof are provided to improve a transmitting characteristic of a feeding line within an RF band by reducing RF parasitic capacitance due to a bonding wire. CONSTITUTION: The first sheet structure(23) is fabricated by forming the first cavity(21) on a predetermined region of the first sheet, printing a couple of metal terminals(22) on both sides of the first cavity, and forming a ground side on a bottom face of the first sheet. The second sheet structure(33) is fabricating by forming the second cavity(31) on the predetermined region of the second sheet and printing a feeding line on both sides of the second cavity. The third sheet structure(43) is fabricated by forming the third cavity on the predetermined region of the third sheet and forming the fourth cavity on both sides of the third cavity. The first to the third structures are formed with one body. The ground side of the first sheet is bonded to a plated metal body.

Abstract translation: 目的：提供RF通信模块的包装装置及其制造方法，通过降低由于接合线引起的RF寄生电容来提高RF频带内的馈线的发送特性。 构成：第一片结构（23）通过在第一片的预定区域上形成第一空腔（21），在第一腔的两侧印刷一对金属端子（22）并形成接地侧 在第一张纸的底面上。 第二片结构（33）通过在第二片的预定区域上形成第二腔（31）并在第二腔的两侧上印刷馈送线来制造。 第三片结构（43）通过在第三片的预定区域上形成第三腔并在第三腔的两侧形成第四腔来制造。 第一至第三结构形成一体。 第一片的接地侧与镀金属体接合。

公开(公告)号：KR1020030092380A

公开(公告)日：2003-12-06

申请号：KR1020020030020

申请日：2002-05-29

Applicant: 전자부품연구원

Inventor： 박성대 ,  이영신 ,  박종철

IPC: H01F41/02

Abstract: PURPOSE: A method for manufacturing a built-in ceramic inductor is provided to reduce the size of a ceramic laminated device and a high-frequency module by forming an inductor having a small-scale line width. CONSTITUTION: A via(111) is punched on a green sheet(100). The via(111) is filled with a conductive paste. A photosensitive conductive paste is printed on the upper surface of the green sheet(100) through screen printing to wrap the via(111). The photosensitive conductive paste is planarized at room temperature in order to obtain a uniform thickness. After the planarization, a lithographic process is performed using a mask on which an inductor pattern is formed. In order to remove moisture after the lithographic process, a drying process is performed. Then, an inductor pattern(121) extending from a first pad(122a) to a second pad(122b) is formed on the upper surface of the green sheet(100).

Abstract translation: 目的：提供一种制造内置陶瓷电感器的方法，通过形成具有小规模线宽的电感器来减小陶瓷层叠装置和高频模块的尺寸。 构成：在生片（100）上冲压通孔（111）。 通孔（111）填充有导电膏。 通过丝网印刷在生片（100）的上表面上印刷感光性导电糊以包裹通路（111）。 感光性导电糊在室温下平坦化，得到均匀的厚度。 在平坦化之后，使用其上形成有电感器图案的掩模来执行光刻处理。 为了在平版印刷工艺之后除去水分，进行干燥处理。 然后，在生片（100）的上表面上形成从第一焊盘（122a）延伸到第二焊盘（122b）的电感器图案（121）。

公开(公告)号：KR1020030004474A

公开(公告)日：2003-01-15

申请号：KR1020010039967

申请日：2001-07-05

Applicant: 전자부품연구원

Inventor： 박종철 ,  조현민 ,  이우성 ,  박성대

IPC: G01R27/28

Abstract: PURPOSE: A device for calibrating stack elements, a method for manufacturing the same and a method for measuring a high frequency characteristics by using the same are provided to eliminate the effect of a via hole and accurately measure a high frequency characteristic by making the structure which is similar to an object to be measured. CONSTITUTION: A device(300) for calibrating stack elements includes an impedance pattern layer located at the same height of an incorporated device to be measured and printed thereon an impedance pattern(310) to performing the calibration of the incorporated device, a via hole layer stacked on the impedance pattern layer and having the same height of a via hole(320) of the incorporated device and a plurality of conductive pads(330) stacked on the via hole layer and connected to the impedance pattern(310) through the via hole(320), wherein the device(300) is calibrated to the impedance pattern(310) corresponding to the position of the incorporated device by contacting a measurement device to perform the calibration at the conductive pads(330).

Abstract translation: 目的：提供一种用于校准堆叠元件的装置，其制造方法以及通过使用它们来测量高频特性的方法，以消除通孔的影响并精确地测量高频特性， 类似于要测量的对象。 构成：用于校准堆叠元件的装置（300）包括阻抗图案层，该阻抗图案层位于被测量的并入装置的相同高度并在其上印刷有阻抗图案（310），以执行所结合的装置的校准，通孔层 堆叠在阻抗图案层上并且具有与所结合的器件的通孔（320）相同的高度和堆叠在通孔层上并通过通孔连接到阻抗图案（310）的多个导电焊盘（330） （320），其中通过接触测量装置在所述导电焊盘（330）处执行所述校准，所述装置（300）被校准为对应于所结合的装置的位置的所述阻抗图案（310）。