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公开(公告)号：KR1020140079014A
公开(公告)日：2014-06-26
申请号：KR1020120148457
申请日：2012-12-18
Applicant: 전자부품연구원
CPC classification number: H04B1/50 , H03H7/0115 , H04B1/0057
Abstract: Disclosed are a diplexer for GPS and an ISM band and an RF receiver module. The RF receiver module according to one embodiment of the present invention comprises: a diplexer which separates and outputs GPS signals in a first frequency band and Bluetooth signals or Wi-Fi signals in a second frequency band from radio signals in dual bands, which are received by an antenna; a GPS receiver block which receives the GPS signals in the first frequency band separated by the diplexer; and a Bluetooth-Wi-Fi transceiver block which includes a Bluetooth receiver block receiving the Bluetooth signals in the second frequency block separated by the diplexer, a Wi-Fi receiver block receiving the Wi-Fi signals in the second frequency block, and a Wi-Fi transmitter block transmitting the Wi-Fi signals in the second frequency band to the diplexer.
Abstract translation: 公开了一种用于GPS和ISM频带和RF接收机模块的双工器。 根据本发明的一个实施例的RF接收机模块包括：双工器，其在接收到的双频带中的无线电信号中分离并输出第一频带中的GPS信号和第二频带中的蓝牙信号或Wi-Fi信号 通过天线 GPS接收器块，其接收由所述双工器分离的所述第一频带中的GPS信号; 以及蓝牙Wi-Fi收发器模块，其包括接收由双工器分离的第二频率块中的蓝牙信号的蓝牙接收器模块，接收第二频率块中的Wi-Fi信号的Wi-Fi接收器模块，以及Wi -Fi发射器块将第二频带中的Wi-Fi信号发送到双工器。
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公开(公告)号：KR101364088B1
公开(公告)日：2014-02-20
申请号：KR1020120101034
申请日：2012-09-12
Applicant: 전자부품연구원
CPC classification number: H01L24/82 , H01L2224/12105 , H01L2224/24 , H01L2224/24137 , H01L2224/24147 , H01L2224/32145 , H01L2224/73267 , H01L2224/92244 , H01L2224/94 , H01L2224/97 , H01L2924/15153 , H01L2924/15311 , H01L2924/15788 , H01L2224/83 , H01L2224/82 , H01L2924/00 , H01L2924/00012
Abstract: A method for manufacturing an interposer includes a step of forming one or more through-vias on a semiconductor substrate; a step of electrically connecting one or more through-vias to a thin-film circuit formed on one side of the semiconductor substrate; and a step of electrically connecting one or more through-vias to an integrated circuit chip formed on the other side of the semiconductor substrate.
Abstract translation: 一种用于制造插入件的方法包括在半导体衬底上形成一个或多个通孔的步骤; 将一个或多个贯通孔电连接到形成在半导体衬底的一侧上的薄膜电路的步骤; 以及将一个或多个贯通孔电连接到形成在半导体基板的另一侧上的集成电路芯片的步骤。
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公开(公告)号：KR1020130075552A
公开(公告)日：2013-07-05
申请号：KR1020110143951
申请日：2011-12-27
Applicant: 전자부품연구원
CPC classification number: H01L24/73 , H01L2224/24 , H01L2224/24227 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/73267 , H01L2224/92244 , H01L2225/1023 , H01L2225/1058 , H01L2924/15153 , H01L2924/15311 , H01L2924/15331 , H01L2924/157 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H01L2924/19107 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
Abstract: PURPOSE: A semiconductor package and a manufacturing method thereof are provided to implement a thin film type semiconductor package by embedding a thin film passive device in a substrate. CONSTITUTION: At least one first hole is formed on a silicon substrate (110) integrated with a thin film passive device (120). An integrated circuit (130) is inserted into the first hole. A connection member (140) for connecting the integrated circuit to the thin film passive device is formed. An organic insulation layer is made of organic materials by a lamination process. An connection electrode is formed after the connection member is molded. [Reference numerals] (AA,CC) Thin film capacitor; (BB,DD) Spiral inductor
Abstract translation: 目的：提供半导体封装及其制造方法，通过将薄膜无源器件嵌入衬底中来实现薄膜型半导体封装。 构成：在与薄膜无源器件（120）集成的硅衬底（110）上形成至少一个第一孔。 集成电路（130）插入到第一孔中。 形成用于将集成电路连接到薄膜无源器件的连接构件（140）。 有机绝缘层通过层压工艺由有机材料制成。 在连接构件成型后形成连接电极。 （附图标记）（AA，CC）薄膜电容器; （BB，DD）螺旋电感
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公开(公告)号：KR101243304B1
公开(公告)日：2013-03-13
申请号：KR1020110072137
申请日：2011-07-20
Applicant: 전자부품연구원
CPC classification number: H01L2224/04105 , H01L2224/16225 , H01L2224/24 , H01L2224/24195 , H01L2924/15311 , H01L2924/19105 , H01L2924/00012
Abstract: 다층 배선 구조의 인터포저 제조 방법은, 박막 수동 소자가 집적된 실리콘 웨이퍼에 양면 라미네이션 공정을 수행하여 유기 물질의 절연층을 각각 형성한 후에 실리콘을 관통하여 형성되는 공간에 집적 회로를 실장하고 실리콘을 관통하여 형성되는 비아 구멍의 내벽으로 패터닝과 전기 도금을 이용하여 박막 수동 소자의 연결 전극으로 사용되는 라이닝 비아를 형성한다. 다음, 라이닝 비아가 형성된 실리콘 웨이퍼에 양면 라미네이션 공정을 수행하여 유기 물질의 절연층을 각각 형성한 후에 집적 회로의 연결 전극으로 사용되는 라이닝 비아를 형성한다.
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公开(公告)号：KR1020130011171A
公开(公告)日：2013-01-30
申请号：KR1020110072137
申请日：2011-07-20
Applicant: 전자부품연구원
CPC classification number: H01L2224/04105 , H01L2224/16225 , H01L2224/24 , H01L2224/24195 , H01L2924/15311 , H01L2924/19105 , H01L2924/00012
Abstract: PURPOSE: An interposer and a manufacturing method thereof are provided to form a through silicon via with a low loss by forming a thick insulation layer using a lamination process. CONSTITUTION: An interposer(10) is formed with a multilayer interconnection structure and includes a silicon wafer(100), an integrated circuit(110), and a thin film passive device(120). A lining via(130) is formed on a silicon wafer. A lining via(140) is formed on an organic insulation layer of the silicon wafer. A lining via(150) is formed with a coaxial structure.
Abstract translation: 目的：通过使用层压工艺形成厚的绝缘层，提供插入件及其制造方法以形成具有低损耗的硅通孔。 构成：内插器（10）形成有多层互连结构，并且包括硅晶片（100），集成电路（110）和薄膜无源器件（120）。 衬底通孔（130）形成在硅晶片上。 衬底通孔（140）形成在硅晶片的有机绝缘层上。 衬套通孔（150）形成有同轴结构。
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Patent Agency Ranking
公开(公告)号：KR1020120113987A
公开(公告)日：2012-10-16
申请号：KR1020110031700
申请日：2011-04-06
Applicant: 전자부품연구원
CPC classification number: H01P1/20345 , H01P1/2088 , H01P1/212
Abstract: PURPOSE: A band-stop filter for radio frequency choke and a substrate including the same are provided to reduce the size of a component by designing the radio frequency choke to be printed on the substrate instead of an inductor element. CONSTITUTION: An upper plate(110) includes a power line pattern(VP). The power line pattern supplies DC power to an active circuit. A lower substrate(120) is formed on the lower part of the upper substrate. The lower substrate includes a stub line pattern(SP). Some parts of the stub line pattern are formed along the power line pattern.
Abstract translation: 目的：提供一种用于射频扼流圈的带阻滤波器和包括该带阻滤波器的基板，以通过设计要印刷在基板上的射频扼流圈而不是电感器元件来减小元件的尺寸。 构成：上板（110）包括电源线图案（VP）。 电源线图案向有源电路提供直流电源。 下基板（120）形成在上基板的下部。 下基板包括短线图案（SP）。 短线图形的一些部分沿电源线图案形成。
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公开(公告)号：KR1020120113815A
公开(公告)日：2012-10-16
申请号：KR1020110028341
申请日：2011-03-29
Applicant: 전자부품연구원
CPC classification number: H01L23/66 , H01L23/043 , H01L23/481 , H01L23/522
Abstract: PURPOSE: A semiconductor substrate and a semiconductor package are provided to implement high frequency system with high integration by using SIW(Substrate Integrated Waveguide) and embedded IC interconnection technology. CONSTITUTION: A cavity is formed on a silicon substrate(100). A first metal layer(103) is formed on the lower side of the cavity by electroplating. Organic materials(105) are filled in the cavity by a lamination process. A second metal layer(107) is formed in the cavity with the organic materials by electroplating. A plurality of via holes(109) are formed between the first metal layer and the second metal layer.
Abstract translation: 目的：提供半导体衬底和半导体封装，通过使用SIW（衬底集成波导）和嵌入式IC互连技术实现高集成度的高频系统。 构成：在硅衬底（100）上形成腔体。 通过电镀在空腔的下侧形成第一金属层（103）。 有机材料（105）通过层压工艺填充在空腔中。 通过电镀在有机材料的空腔中形成第二金属层（107）。 在第一金属层和第二金属层之间形成多个通孔（109）。
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公开(公告)号：KR101115526B1
公开(公告)日：2012-02-27
申请号：KR1020100006617
申请日：2010-01-25
Applicant: 전자부품연구원
IPC: H01L21/60
Abstract: 본 발명은 관통 실리콘 비아(Through Silicon Via; TSV) 제조 방법에 관한 것으로, 특히 폴리머 진공 열압착 공정을 이용한 관통 실리콘 비아 제조 방법에 관한 것이다.
본 발명의 관통 실리콘 비아 제조 방법은 실리콘 기판의 전면에 구멍을 뚫는 (a) 단계; 상기 실리콘 기판의 전면에 폴리머 필름을 놓는 (b) 단계; 진공 상태에서 열과 압력을 이용하여 상기 폴리머 필름을 상기 실리콘 기판의 전면에 접합시키고 상기 구멍에 채워 넣는 (c) 단계; 상기 폴리머 필름으로 메워진 구멍을 처음 뚫을 때의 지름보다 작게 재차 뚫는 (d) 단계; 및 상기 재차 뚫린 구멍을 금속으로 메우는 (e) 단계를 포함하여 이루어진다. -
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