公开(公告)号：US20060044774A1

公开(公告)日：2006-03-02

申请号：US10931124

申请日：2004-08-30

Applicant: Samir Vasavda ,  William Edwards ,  Michael Kornprobst ,  David Nelsen

Inventor： Samir Vasavda ,  William Edwards ,  Michael Kornprobst ,  David Nelsen

IPC: H05K7/14 ,  H05K7/10

CPC classification number: G06F1/185 ,  G02B6/4246 ,  G02B6/4284 ,  G02B6/4292 ,  G06F1/184 ,  G06F1/186 ,  H01R12/716 ,  H01R12/724 ,  H01R2201/04 ,  H05K1/141 ,  H05K7/142 ,  H05K7/1428 ,  H05K2201/045 ,  H05K2201/10189 ,  H05K2201/10515 ,  H05K2203/1572

Abstract: A system for providing dual 10 GB uplinks in the front side of a single rack unit switch that stacks two MSA X2 I/O devices in a limited space. In one embodiment the two X2 I/O devices are mounted on opposite sides of a single circuit board positioned above the motherboard.

Abstract translation: 用于在单个机架单元交换机的前侧提供双重10 GB上行链路的系统，其在有限的空间中堆叠两个MSA X2 I / O设备。 在一个实施例中，两个X2 I / O设备安装在位于主板上方的单个电路板的相对侧上。

公开(公告)号：US20050270875A1

公开(公告)日：2005-12-08

申请号：US11145009

申请日：2005-06-06

Applicant: Takanori Saeki

Inventor： Takanori Saeki

IPC: G06F13/16 ,  G06F12/00 ,  G11C5/06 ,  G11C7/00 ,  H05K1/14 ,  H05K3/36

CPC classification number: G11C5/066 ,  G06F13/1684 ,  G11C5/04 ,  H05K1/14 ,  H05K1/141 ,  H05K3/366 ,  H05K2201/045 ,  H05K2201/10159 ,  Y02D10/14

Abstract: There is provided a memory module that facilitates meeting the needs of high-speed performance and large capacity. It comprises first module substrates (10 through 108), each with multiple DRAM devices (11), and a second module substrate whereon the first modules (10 through 108) are mounted, signal line groups connected to the multiple first modules respectively are provided in parallel, and a controller LSI (50), connected to the multiple first modules respectively via the signal line groups provided in parallel, that converts the signal lines into fewer signal lines than the total number of the signal line groups and outputs the result is provided, and the second module substrate (20) is mounted on a motherboard (40).

Abstract translation: 提供了一个可以满足高速性能和大容量需求的内存模块。 它包括第一模块衬底（10至108），每个具有多个DRAM器件（11），以及安装有第一模块（10至108）的第二模块衬底，分别连接到多个第一模块的信号线组 并联的控制器LSI（50），分别经由并联设置的信号线组连接到多个第一模块，将信号线转换成比信号线组的总数少的信号线，并输出结果 ，并且第二模块基板（20）安装在母板（40）上。

公开(公告)号：US06914786B1

公开(公告)日：2005-07-05

申请号：US09881151

申请日：2001-06-14

Applicant: Erik Paulsen ,  William Page ,  Erich S. Otto

Inventor： Erik Paulsen ,  William Page ,  Erich S. Otto

IPC: H01L23/498 ,  H01L23/538 ,  H01R12/16 ,  H05K1/14 ,  H05K3/34

CPC classification number: H05K1/141 ,  H01L23/49833 ,  H01L23/5382 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/144 ,  H05K3/3436 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/10734

Abstract: The present invention is directed to a converter device. In a first aspect of the present invention, a converter device includes a board having a first side and a second side. The first side includes a first set of contacts suitable for electrically contacting an integrated circuit having a first configuration. The second side includes a second set of contacts suitable for electrically contacting a circuit board having a second configuration. The second set of contacts is communicatively coupled to the first set of contacts.

Abstract translation: 本发明涉及一种转换器装置。 在本发明的第一方面，一种转换器装置包括具有第一侧和第二侧的板。 第一侧包括适于电接触具有第一构造的集成电路的第一组触点。 第二侧包括适于电接触具有第二构造的电路板的第二组触点。 第二组触点通信地耦合到第一组触点。

公开(公告)号：US06906415B2

公开(公告)日：2005-06-14

申请号：US10184340

申请日：2002-06-27

Applicant: Tongbi Jiang ,  Setho Sing Fee ,  Tay Wuu Yean ,  Lim Thiam Chye

Inventor： Tongbi Jiang ,  Setho Sing Fee ,  Tay Wuu Yean ,  Lim Thiam Chye

IPC: H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10 ,  H05K1/14 ,  H05K3/34 ,  H05K3/40 ,  H01L23/34

CPC classification number: H01L23/13 ,  H01L23/3128 ,  H01L23/49805 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2225/1035 ,  H01L2225/1064 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/19041 ,  H05K1/141 ,  H05K3/3436 ,  H05K3/3442 ,  H05K3/403 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/09181 ,  H05K2201/10727

Abstract: A multidie semiconductor device (MDSCD) package includes a generally planar interposer comprising a substrate with a central receptacle, upper surface conductors, and outer connectors on the lower surface of the interposer. Conductive vias connect upper surface conductors with outer connectors. One or more semiconductor devices may be mounted in the receptacle and one or more other semiconductor devices mounted above and/or below the interposer and attached thereto. The package may be configured to have a footprint not significantly larger than the footprint of the largest device and/or a thickness not significantly greater than the combined thickness of included devices. Methods for assembling and encapsulating packages from multidie wafers and multi-interposer sheets or strips are disclosed. Methods for combining a plurality of packages into a single stacked package are disclosed. The methods may include use of somewhat laterally extending intermediate conductive elements, flip-chip style electrical connection, or both within the same package.

Abstract translation: 多芯片半导体器件（MDSCD）封装包括大体上平面的中介层，其包括具有中心插座的基板，上表面导体以及插入件下表面上的外部连接器。 导电通孔将上表面导体与外部连接器相连。 一个或多个半导体器件可以安装在插座中，以及安装在插入件上方和/或下方并附着于其上的一个或多个其它半导体器件。 封装可以被配置为具有不显着大于最大器件的占地面积和/或不显着大于所包括的器件的组合厚度的厚度。 公开了用于组装和封装来自多芯片晶片和多中介片片或条的封装的方法。 公开了将多个封装组合成单个堆叠封装的方法。 这些方法可以包括在相同封装内使用稍微侧向延伸的中间导电元件，倒装片式电连接或两者。

公开(公告)号：US20040136164A1

公开(公告)日：2004-07-15

申请号：US10705557

申请日：2003-11-10

Inventor： Terrel L. Morris

IPC: H05K007/20

CPC classification number: H05K7/20154 ,  H01L2224/16225 ,  H01L2924/00014 ,  H05K1/0203 ,  H05K1/14 ,  H05K1/141 ,  H05K3/366 ,  H05K3/368 ,  H05K2201/045 ,  H05K2201/064 ,  H05K2201/10189 ,  H05K2201/10515 ,  H01L2224/0401

Abstract: One embodiment of the invention is a system comprising a first component that generates heat, and a second component that is thermally connected to the first component, wherein the heat from the first component is transferred to a coolant through the second component, and the second component has a function in the computer system associated with an operation of the system other than transferring heat.

Abstract translation: 本发明的一个实施例是包括产生热量的第一部件和与第一部件热连接的第二部件的系统，其中来自第一部件的热量通过第二部件传递到冷却剂，而第二部件 在与传送热量不同的系统操作相关联的计算机系统中具有功能。

公开(公告)号：US06693362B2

公开(公告)日：2004-02-17

申请号：US09988575

申请日：2001-11-20

Applicant: Kiyotaka Seyama ,  Hiroshi Yamada ,  Haruhiko Yamamoto

Inventor： Kiyotaka Seyama ,  Hiroshi Yamada ,  Haruhiko Yamamoto

IPC: H01L2348

CPC classification number: H05K1/141 ,  H01L23/10 ,  H01L23/3675 ,  H01L23/5385 ,  H01L25/0652 ,  H01L25/162 ,  H01L2221/68345 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/1616 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3011 ,  H05K1/182 ,  H05K3/3436 ,  H05K3/4602 ,  H05K2201/045 ,  H05K2201/10674 ,  H05K2203/1572

Abstract: A multichip module is provided. The multichip module comprises a rigid substrate including a core material and having an opening, a thin film fixed on an upper surface of the rigid substrate so as to be electrically connected to the rigid substrate and to close the opening, a first chip mounted on the upper surface of the thin film, and a second chip mounted on the under surface of the thin film so as to be located in the opening of the rigid substrate. The rigid substrate and the thin film form a wiring substrate having a composite structure.

Abstract translation: 提供多芯片模块。 所述多芯片模块包括刚性基板，所述刚性基板包括芯材并且具有开口，固定在所述刚性基板的上表面上的薄膜，以便电连接到所述刚性基板并闭合所述开口;安装在所述刚性基板上的第一芯片 薄膜的上表面和安装在薄膜的下表面上的第二芯片，以便位于刚性基板的开口中。 刚性基板和薄膜形成具有复合结构的布线基板。

公开(公告)号：US20040004822A1

公开(公告)日：2004-01-08

申请号：US10609873

申请日：2003-06-30

Inventor： Hermann Ruckerbauer ,  Maksim Kuzmenka

IPC: H01R012/16

CPC classification number: H05K1/14 ,  H05K2201/045

Abstract: Memory modules without signal-conditioning devices (unbuffered, unregistered) are provided in a system by using adapter cards that have signal-conditioning devices and are then operated in the manner of memory modules with signal-conditioning devices (buffered, registered). Systems can thereby be expanded in a very simple manner and can be flexibly adapted according to requirements, and for this purpose only one type (unbuffered, unregistered) of memory module is required.

Abstract translation: 通过使用具有信号调节装置的适配器卡，然后以具有信号调节装置（缓冲，注册）的存储器模块的方式操作，在系统中提供了没有信号调节装置（无缓冲，未注册）的存储器模块。 因此，系统可以以非常简单的方式进行扩展，并且可以根据要求灵活地进行调整，为此，只需要一种类型（无缓冲，未注册）的存储器模块。

公开(公告)号：US20030236005A1

公开(公告)日：2003-12-25

申请号：US10183614

申请日：2002-06-25

Inventor： Yinan Wu ,  Tao Liang ,  John R. Benham

IPC: H05K001/00 ,  H01R012/00

CPC classification number: H01R12/526 ,  H05K1/0239 ,  H05K1/14 ,  H05K1/141 ,  H05K7/1458 ,  H05K2201/044 ,  H05K2201/045

Abstract: An assembly (for example, an assembly in the form of an interposer that is distinct from a motherboard and from the devices that communicate with the motherboard) includes electromagnetic couplings. Each of the electromagnetic couplings couples signals being communicated between a device and a bus. Each of the electromagnetic couplings is connected to (a) an associated bus connector to provide connections of the couplings to the bus, and (b) an associated device connector to provide connections of the couplings to the device.

Abstract translation: 组件（例如，与主板和与主板通信的设备不同的插入件形式的组件）包括电磁耦合。 每个电磁耦合耦合在设备和总线之间传送的信号。 每个电磁耦合器连接到（a）相关联的总线连接器以提供耦合到总线的连接，以及（b）相关联的设备连接器，以提供耦合到设备的连接。

公开(公告)号：US06658730B2

公开(公告)日：2003-12-09

申请号：US10091807

申请日：2002-03-06

Applicant: Joe A. Harrison ,  Bram Leader

Inventor： Joe A. Harrison ,  Bram Leader

IPC: H05K330

CPC classification number: G06F1/189 ,  H05K1/0263 ,  H05K1/141 ,  H05K3/325 ,  H05K3/368 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/10325 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49146

Abstract: A system for delivering power to a processor enables a DC-to-DC converter substrate to be secured to the processor carrier in the Z-axis direction. The ability to assemble the converter to the processor in this way facilitates assembly compared to systems in which the converter is plugged in to the processor carrier in the direction substantially parallel to the surface of the motherboard.

公开(公告)号：US20030058628A1

公开(公告)日：2003-03-27

申请号：US09964151

申请日：2001-09-25

Inventor： Jeffrey Boylan ,  Carl Milton Wildrick ,  Gordon K.Y. Lee

IPC: H05K007/10 ,  H05K007/12

CPC classification number: H05K1/141 ,  H05K1/0295 ,  H05K3/3421 ,  H05K3/3447 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/09954

Abstract: The adapter couples a power module to a circuit board. An adapter embodying the present invention can be configured to allow the connection of any power module regardless of pin out to any circuit board. Signal modifying circuitry can also be added to the adapter to enhance or simply modify the signal to the end user's circuit board. The modifying circuitry can act on either the input to the adapter or the output from the adapter. At least one conductive path couples the input interconnects and the output interconnects.

Abstract translation: 适配器将电源模块连接到电路板。 体现本发明的适配器可以被配置为允许任何电源模块的连接，而不管引脚到任何电路板。 信号修改电路也可以添加到适配器，以增强或简单地将信号修改到终端用户的电路板。 修改电路可以作用于适配器的输入或适配器的输出。 至少一个导电路径耦合输入互连和输出互连。