公开(公告)号：CA2867116C

公开(公告)日：2020-02-18

申请号：CA2867116

申请日：2012-11-15

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL ,  SCHWARZ ERIC MARK ,  SLEGEL TIMOTHY ,  JACOBI CHRISTIAN

IPC: G06F9/34

Abstract: A Load Count to Block Boundary instruction is provided that provides a distance from a specified memory address to a specified memory boundary. The memory boundary is a boundary that is not to be crossed in loading data. The boundary may be specified a number of ways, including, but not limited to, a variable value in the instruction text, a fixed instruction text value encoded in the opcode, or a register based boundary; or it may be dynamically determined.

公开(公告)号：PL3123327T3

公开(公告)日：2019-09-30

申请号：PL15711709

申请日：2015-03-17

Applicant: IBM

Inventor： GREINER DAN ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  SCHMIDT DONALD WILLIAM ,  BUSABA FADI YUSUF ,  KUBALA JEFFREY PAUL ,  BRADBURY JONATHAN DAVID ,  HELLER LISA CRANTON ,  SLEGEL TIMOTHY

IPC: G06F9/50 ,  G06F9/38

公开(公告)号：HUE038976T2

公开(公告)日：2018-12-28

申请号：HUE12871072

申请日：2012-11-15

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL ,  SLEGEL TIMOTHY ,  SCHWARZ ERIC MARK ,  JACOBI CHRISTIAN

IPC: G06F9/30

公开(公告)号：SI3123326T1

公开(公告)日：2018-09-28

申请号：SI201530283

申请日：2015-03-16

Applicant: IBM

Inventor： GREINER DAN ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  SCHMIDT DONALD WILLIAM ,  BUSABA FADI YUSUF ,  KUBALA JEFFREY PAUL ,  BRADBURY JONATHAN DAVID ,  HELLER LISA CRANTON ,  SLEGEL TIMOTHY

IPC: G06F9/00

公开(公告)号：SI2769305T1

公开(公告)日：2018-09-28

申请号：SI201231340

申请日：2012-11-15

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL ,  SLEGEL TIMOTHY ,  SCHWARZ ERIC MARK ,  JACOBI CHRISTIAN

IPC: G06F9/00

公开(公告)号：PL3123326T3

公开(公告)日：2018-09-28

申请号：PL15711701

申请日：2015-03-16

Applicant: IBM

Inventor： GREINER DAN ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  SCHMIDT DONALD WILLIAM ,  BUSABA FADI YUSUF ,  KUBALA JEFFREY PAUL ,  BRADBURY JONATHAN DAVID ,  HELLER LISA CRANTON ,  SLEGEL TIMOTHY

IPC: G06F9/38 ,  G06F9/50

公开(公告)号：LT3123326T

公开(公告)日：2018-07-10

申请号：LT15711701

申请日：2015-03-16

Applicant: IBM

Inventor： GREINER DAN ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  SCHMIDT DONALD WILLIAM ,  BUSABA FADI YUSUF ,  KUBALA JEFFREY PAUL ,  BRADBURY JONATHAN DAVID ,  HELLER LISA CRANTON ,  SLEGEL TIMOTHY

IPC: G06F9/50 ,  G06F9/38

公开(公告)号：AU2015238662B8

公开(公告)日：2018-04-19

申请号：AU2015238662

申请日：2015-03-16

Applicant: IBM

Inventor： HELLER LISA CRANTON ,  BRADBURY JONATHAN DAVID ,  KUBALA JEFFREY PAUL ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  GREINER DAN ,  SLEGEL TIMOTHY ,  BUSABA FADI YUSUF ,  SCHMIDT DONALD WILLIAM ,  GAINEY JR CHARLES

IPC: G06F9/455 ,  G06F9/50

Abstract: A computer system includes a virtual machine (VM) configuration with one or more cores. Each core is enabled to operate in a single thread (ST) mode or a multithreading (MT) mode. The ST mode consists of a single thread and the MT mode consists of a plurality of threads on shared resources of a respective core. The computer system includes a core-oriented system control area (COSCA) having a common area representing all of the cores of the VM configuration and separate core description areas for each of the cores in the VM configuration. Each core description area indicates a location of one or more thread description areas each representing a thread within the respective core, and each thread description area indicates a location of a state description of the respective thread.

公开(公告)号：ZA201605466B

公开(公告)日：2017-08-30

申请号：ZA201605466

申请日：2016-08-05

Applicant: IBM

Inventor： GAINEY JR CHARLES (DECEASED) ,  SLEGEL TIMOTHY ,  HELLER LISA CRANTON ,  BRADBURY JONATHAN DAVID ,  KUBALA JEFFREY PAUL ,  BUSABA FADI YUSUF ,  SCHMIDT DONALD WILLIAM ,  OSISEK DAMIAN LEO ,  FARRELL MARK ,  GREINER DAN

Abstract: Embodiments relate to thread context restoration. One aspect is a multithreading computer system including a configuration with a core configurable between a single thread (ST) mode and a multithreading (MT) mode. The ST mode addresses a primary thread and the MT mode addresses the primary thread and one or more secondary threads on shared resources of the core. A multithreading facility is configured to control utilization of the configuration to perform a method including disabling one or more secondary threads based on switching from MT mode to ST mode. A thread context of secondary threads is made unavailable to programs. Based on a last-set program-specified maximum thread-id indicating MT, the thread context is obtained by a) executing a set MT instruction to resume the MT mode, and b) based on being in the resumed MT mode, accessing the thread context.

公开(公告)号：DE112015003759T5

公开(公告)日：2017-08-17

申请号：DE112015003759

申请日：2015-09-14

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  SCHMIDT DONALD WILLIAM ,  ROSA DANIEL VINCENT ,  BARTIK JANE

IPC: G06F11/30 ,  G06F9/30

Abstract: Ein System und Verfahren zum Implementieren eines Befehls zum Bearbeiten einer Mehrzahl von Zählern, der ein Festlegen einer Zählergruppe auf der Grundlage des Befehls zum Bearbeiten, ob eine Berechtigung für den Zugang zu der Zählergruppe vorliegt und eines Speicherblocks in einem Speicher auf der Grundlage des Befehls zum Bearbeiten beinhaltet. In Reaktion auf ein Feststellen, dass eine Berechtigung für den Zugang vorliegt, extrahieren das System und Verfahren die Mehrzahl von Zählern aus der Zählergruppe in Reaktion auf ein Feststellen, dass eine Berechtigung für den Zugang vorliegt, und speichern die Mehrzahl von Zählern in dem Speicherblock.