公开(公告)号：EP1390988A2

公开(公告)日：2004-02-25

申请号：EP02727197.2

申请日：2002-03-05

Applicant: ROBERT BOSCH GMBH

Inventor： BENZEL, Hubert ,  WEBER, Heribert ,  ARTMANN, Hans ,  SCHAEFER, Frank

IPC: H01L31/18 ,  H01L31/028 ,  B28B1/00

CPC classification number: B81B3/0083 ,  B81B2203/0315 ,  B81C2201/0114 ,  B81C2201/0115 ,  B81C2201/0178 ,  C25F3/12 ,  C25F3/14 ,  H01L21/306 ,  H01L21/3081

Abstract: The invention relates to a simple and cost-effective method for producing optically transparent regions (5, 6) in a silicon substrate (1) with which the optically transparent regions can be realized with any thickness and can be provided above a cavity located in the silicon substrate. To this end, at least one defined region (5, 6) of the silicon substrate (1) is firstly etched whereby rendering it porous. Afterwards, the defined porous region (5, 6) of the silicon substrate (1) is oxidized.

公开(公告)号：EP1119032A3

公开(公告)日：2001-10-17

申请号：EP01107622.1

申请日：1993-04-20

Applicant: Denso Corporation

Inventor： Fukada, Tsuyoshi ,  Yoshino, Yoshimi ,  Tanizawa, Yukihiko

IPC: H01L21/3063 ,  H01L21/78 ,  G01P15/12 ,  G01P15/08 ,  G01L9/00

CPC classification number: B81C1/00888 ,  B81B2201/0235 ,  B81C1/00158 ,  B81C2201/0114 ,  B81C2201/053 ,  G01L9/0055 ,  G01P15/0802 ,  G01P15/123 ,  H01L21/3063 ,  H01L21/78 ,  Y10S148/028 ,  Y10S148/159 ,  Y10S438/977

Abstract: There is disclosed a method and an apparatus for producing a semiconductor device having a diaphragm in the form of a thin part and an integrated circuit section with electrode on the same substrate, said method comprises a first step of forming a semiconductor layer of a second conduction type over a single-crystal semiconductor substrate of a first conduction type; a second step of forming the integrated circuit section with electrode on the semiconductor layer; a third step of forming the electrode in a scribe line area on the semiconductor layer and electrically connecting the electrode in the scribe line area to the electrode of the integrated circuit section; a fourth step of electrochemically etching predetermined parts of the substrate by transmitting electricity for the electrochemical etching through the electrode in the scribe line area, to form the diaphragm from the semiconductor layer and a fifth step of dicing the substrate into chips along the scribe line area, each of the chips forming the semiconductor device.

Abstract translation: 公开了一种用于制造半导体器件的方法和装置，该半导体器件具有薄膜形式的隔膜和在同一衬底上具有电极的集成电路部分，所述方法包括：形成第二导电半导体层的第一步骤 在第一导电类型的单晶半导体衬底上; 在半导体层上形成具有电极的集成电路部分的第二步骤; 在半导体层上的划线区域中形成电极并将划线区域中的电极与集成电路部分的电极电连接的第三步骤; 通过在划线区域中的电极传输用于电化学蚀刻的电力来电化学蚀刻基板的预定部分，从半导体层形成隔膜的第四步骤，以及沿着划线区域将基板切割成芯片的第五步骤 ，形成半导体器件的每个芯片。

公开(公告)号：EP0980446A4

公开(公告)日：2000-08-23

申请号：EP98921054

申请日：1998-05-08

Applicant: NANOSYSTEMS INC

Inventor： BEETZ CHARLES P JR ,  BOERSTLER ROBERT W ,  STEINBECK JOHN ,  WYNN DAVID R

IPC: H01J9/12 ,  B81B1/00 ,  B81C1/00 ,  C25F3/12 ,  H01J9/02 ,  H01J43/24 ,  H01L21/3063 ,  C25D5/34 ,  C25D5/48 ,  C25D9/06

CPC classification number: H01J43/246 ,  B81B1/004 ,  B81C1/00166 ,  B81C1/00595 ,  B81C2201/0114 ,  C25F3/12 ,  H01J9/02 ,  H01L21/3063 ,  Y10S977/888

Abstract: An element with elongated, high aspect ratio channels (30) such as microchannel plate is fabricated by electrochemical etching of a p-type silicon element (10) in a electrolyte (26) to form channels extending through the element. The electrolyte may be an aqueous electrolyte. For use as a microchannel plate, the silicon surfaces of the channels can be converted to insulating silicon dioxide (28), and a dynode material (32) with a high electron emissivity can be deposited onto the insulating surfaces of the channels. New dynode materials are also disclosed.

Abstract translation: 通过电解质（26）中的p型硅元件（10）的电化学蚀刻以形成延伸穿过该元件的沟道来制造具有诸如微通道板的细长高纵横比通道（30）的元件。 电解质可以是含水电解质。 为了用作微通道板，通道的硅表面可以被转换成绝缘二氧化硅（28），并且具有高电子发射率的打拿极材料（32）可以被沉积到通道的绝缘表面上。 新的打拿极材料也被披露。

公开(公告)号：EP0980446A1

公开(公告)日：2000-02-23

申请号：EP98921054.7

申请日：1998-05-08

Applicant: Nanosystems, Inc.

Inventor： BEETZ, Charles, P., Jr. ,  BOERSTLER, Robert, W. ,  STEINBECK, John ,  WYNN, David, R.

IPC: C25D5/34 ,  C25D5/48 ,  C25D9/06 ,  C25F3/12

CPC classification number: H01J43/246 ,  B81B1/004 ,  B81C1/00166 ,  B81C1/00595 ,  B81C2201/0114 ,  C25F3/12 ,  H01J9/02 ,  H01L21/3063 ,  Y10S977/888

Abstract: An element with elongated, high aspect ratio channels (30) such as microchannel plate is fabricated by electrochemical etching of a p-type silicon element (10) in a electrolyte (26) to form channels extending through the element. The electrolyte may be an aqueous electrolyte. For use as a microchannel plate, the silicon surfaces of the channels can be converted to insulating silicon dioxide (28), and a dynode material (32) with a high electron emissivity can be deposited onto the insulating surfaces of the channels. New dynode materials are also disclosed.

公开(公告)号：EP0951047A2

公开(公告)日：1999-10-20

申请号：EP99106041.9

申请日：1999-03-25

Applicant: CANON KABUSHIKI KAISHA

Inventor： Iwasaki, Tatsuya ,  Den, Tohru

IPC: H01J1/30

CPC classification number: H01F1/009 ,  B81C1/00087 ,  B81C2201/0114 ,  B82Y10/00 ,  B82Y25/00 ,  G11B5/7325 ,  G11B5/743 ,  G11B5/855 ,  G11C2213/81 ,  H01F1/0081 ,  H01J1/304 ,  H01J1/3042 ,  H01J9/025 ,  H01J2201/30469 ,  Y10S977/778 ,  Y10S977/78 ,  Y10S977/939

Abstract: The invention provides a nanostructure including an anodized film including nanoholes. The anodized film is formed on a substrate having a surface including at least one material selected from the group consisting of semiconductors, noble metals, Mn, Fe, Co, Ni, Cu and carbon. The nanoholes are cut completely through the anodized film from the surface of the anodized film to the surface of the substrate. The nanoholes have a first diameter at the surface of the anodized film and a second diameter at the surface of the substrate. The nanoholes are characterized in that either a constriction exists at a location between the surface of the anodized film and the surface of the substrate, or the second diameter is greater than the first diameter.

Abstract translation: 本发明提供了包括包含纳米孔的阳极氧化膜的纳米结构。 阳极氧化膜形成在具有包括从由半导体，贵金属，Mn，Fe，Co，Ni，Cu和碳组成的组中选择的至少一种材料的表面的衬底上。 纳米孔从阳极氧化膜的表面完全通过阳极氧化膜切割到基材表面。 纳米孔在阳极氧化膜的表面处具有第一直径并且在基板的表面处具有第二直径。 纳米孔的特征在于，在阳极氧化膜的表面和基材表面之间的位置存在收缩部，或者第二直径大于第一直径。

公开(公告)号：EP3323011A1

公开(公告)日：2018-05-23

申请号：EP16823996.0

申请日：2016-07-14

Applicant: Technology Innovation Momentum Fund (Israel) Limited Partnership

Inventor： KRYLOV, Viacheslav ,  RAZ, Ariel ,  MENDLOVIC, David

IPC: G02B26/00 ,  H01S5/022 ,  H01L23/02

CPC classification number: H04N9/045 ,  B81B3/0056 ,  B81B2201/042 ,  B81C1/00507 ,  B81C2201/0114 ,  G02B26/001

Abstract: Disclosed herein is a novel a tunable Micro-Electro-Mechanical (MEMS) Etalon system including: a functional layer patterned to define a suspension structure for suspending a first mirror being an aperture mirror of the Etalon, an aperture mirror coupled to the suspension structure, and a back layer including a second mirror, being a back mirror of the Etalon. The functional layer may be located above the back layer and the back layer may include spacer structures protruding therefrom towards the aperture mirror to define a minimal gap between the aperture mirror and the back mirror and prevent collision between them. The aspect ratio between the width of the etalon/mirrors may be high (e.g. at least 500), and the minimal gap/distance between the mirrors may be small in the order of tens of nanometers (nm). Accordingly, in some implementations the parallelism between the aperture mirror and the back mirror is adjustable to avoid chromatic artifacts associated with spatial variations in the spectral transmission profile across the etalon.

公开(公告)号：EP1999302A1

公开(公告)日：2008-12-10

申请号：EP07730927.6

申请日：2007-02-06

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE

Inventor： BUTTARD, Denis

IPC: C25D5/02 ,  C25D17/10 ,  C25F3/14 ,  C25D7/12 ,  B81C1/00

CPC classification number: B81C1/00126 ,  B81C2201/0114 ,  C25D1/00 ,  C25D1/006 ,  C25D5/02 ,  C25D5/16 ,  C25D7/12 ,  C25D17/005 ,  C25F3/14 ,  H01L21/02203 ,  H01L21/02238 ,  H01L21/02258 ,  H01L21/306 ,  H01L21/3063 ,  H01L21/31675

Abstract: The invention provides a method and a device for reliable, rapid, simple, easily implementable and reproducible electrochemical microstructuring and/or nanostructuring. For this purpose, the subject of the invention is a method for electrochemically structuring a specimen (12) made of a conductive or semiconductor material and comprising two opposed faces, a front face (11) and a rear face (13). The method comprises the steps consisting: in bringing at least the front face (11) of the specimen (12) into contact with at least one electrolytic solution (4) stored in at least one reservoir (3); in placing at least one counterelectrode (6) in the electrolyte (4) opposite the front face (11) of the specimen (12) that has to be structured; in placing at least one working electrode (7) in dry ohmic contact with the rear face (13) of the specimen (12), said working electrode having structuring features (14); and in applying an electric current between the two electrodes in order to obtain an electrochemical reaction at the interface between the front face (11) of the specimen (12) and the electrolyte (4), with a current density that is modulated by the structuring features (14) of the working electrode (7) in order to etch material from or deposit material on the front face (11) of the specimen (12).

公开(公告)号：EP1119032B1

公开(公告)日：2007-12-12

申请号：EP01107622.1

申请日：1993-04-20

Applicant: Denso Corporation

Inventor： Fukada, Tsuyoshi ,  Yoshino, Yoshimi, c/o Intellectual Prop. Dept. ,  Tanizawa, Yukihiko, c/oIntellectual Prop. Dept.

IPC: H01L21/3063 ,  H01L21/78 ,  G01P15/12 ,  G01P15/08 ,  G01L9/00

CPC classification number: B81C1/00888 ,  B81B2201/0235 ,  B81C1/00158 ,  B81C2201/0114 ,  B81C2201/053 ,  G01L9/0055 ,  G01P15/0802 ,  G01P15/123 ,  H01L21/3063 ,  H01L21/78 ,  Y10S148/028 ,  Y10S148/159 ,  Y10S438/977

公开(公告)号：EP1390988B1

公开(公告)日：2006-07-26

申请号：EP02727197.2

申请日：2002-03-05

Applicant: ROBERT BOSCH GMBH

Inventor： BENZEL, Hubert ,  WEBER, Heribert ,  ARTMANN, Hans ,  SCHAEFER, Frank

IPC: H01L31/18 ,  H01L31/028 ,  B28B1/00

CPC classification number: B81B3/0083 ,  B81B2203/0315 ,  B81C2201/0114 ,  B81C2201/0115 ,  B81C2201/0178 ,  C25F3/12 ,  C25F3/14 ,  H01L21/306 ,  H01L21/3081

Abstract: The invention relates to a simple and cost-effective method for producing optically transparent regions (5, 6) in a silicon substrate (1) with which the optically transparent regions can be realized with any thickness and can be provided above a cavity located in the silicon substrate. To this end, at least one defined region (5, 6) of the silicon substrate (1) is firstly etched whereby rendering it porous. Afterwards, the defined porous region (5, 6) of the silicon substrate (1) is oxidized.

公开(公告)号：EP1403211A2

公开(公告)日：2004-03-31

申请号：EP03255693.8

申请日：2003-09-11

Applicant: PTS Corporation

Inventor： Staple, Bevan ,  Buriak, Jilian

IPC: B81B3/00

CPC classification number: B82Y30/00 ,  B81C1/00476 ,  B81C1/00801 ,  B81C2201/0114 ,  B81C2201/0133 ,  B81C2201/0139 ,  B81C2201/053

Abstract: A microelectromechanical structure is formed by depositing sacrificial and structural material over a substrate to form a structural layer on a component electrically attached with the substrate (step 102). The galvanic potential of the structural layer is greater than the galvanic potential of the component. At least a portion of the structural material is covered with a protective material that has a galvanic potential less than or equal to the galvanic potential of the component (step 104 or 106). The sacrificial material is removed with a release solution (step 108 or 110). At least one of the protective material and release solution is surfactanated, the surfactant functionalizing a surface of the component.

Abstract translation: 形成微机电结构涉及沉积牺牲和结构材料在底物，至少覆盖所述结构层的一部分与保护性材料，其中所述保护性材料构成的电势小于或等于所述组件的电势，并 用剥离溶液除去牺牲材料。 形成微机电结构涉及沉积牺牲和结构材料在基材以形成与基材，其中，所述结构层构成的电势比所述部件的电势更高的电连接的部件上的结构层; 至少覆盖有保护性材料，其中所述保护性材料构成的电势小于或等于所述组件的电势，所述结构层的一部分; 并用剥离溶液，其中该释放溶液和保护材料中的至少一个被surfactanated除去牺牲材料。 因此独立claimsoft被包括为用于制造装置，其包括沉积材料在基板的层的方法，至少覆盖材料层的一部分与保护材料，浸渍基材电解质在一个，以及将 电解质和基板之间的电势差。