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    General purpose, programmable media processor
    141.
    发明公开
    General purpose, programmable media processor 失效
    Drahtlose Vorrichtung mit einem programmierbaren Allzweckmedienprozessor

    公开(公告)号：EP1879103A2

    公开(公告)日：2008-01-16

    申请号：EP07112545.4

    申请日：1996-08-16

    Applicant: MicroUnity Systems Engineering, Inc.

    Inventor： Hansen, Craig ,  Moussouris, John

    IPC: G06F9/30 ,  G06F9/38 ,  G06F15/78

    CPC classification number: G06F9/3802 ,  G06F9/30 ,  G06F9/30014 ,  G06F9/30018 ,  G06F9/30025 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/3004 ,  G06F9/30043 ,  G06F9/30072 ,  G06F9/30087 ,  G06F9/30145 ,  G06F9/3867 ,  G06F9/3869 ,  G06F12/0875 ,  G06F12/1027 ,  G06F15/7832 ,  G06F15/7842 ,  G06F2212/2515 ,  H04N21/2365 ,  H04N21/238 ,  H04N21/23805 ,  H04N21/4347 ,  Y02D10/13

    Abstract: A wireless device for processing streams of media data in a wireless bi-directional communications network. The bi-directional communications network is capable of transmitting and receiving media data streams which comprise a combination of at least two of audio, video, radio, graphics, encryption, authentication, and networking information. The wireless device has at least one programmable media processor (12) for receiving, processing and transmitting the stream of media data over the bi-directional communications network. The processor executes group instructions to read a plurality of data elements of the media data stream from a register file (110), to perform, on the data elements, group operations including both group integer and group floating point operations capable of dynamically partitioning the data by each specifying one of a plurality of data element sizes, and to write concatenated results in the register file.

    Abstract translation: 一种用于在无线双向通信网络中处理媒体数据流的无线设备。 双向通信网络能够发送和接收包括音频，视频，无线电，图形，加密，认证和网络信息中的至少两个的组合的媒体数据流。 无线设备具有至少一个可编程媒体处理器（12），用于通过双向通信网络接收，处理和发送媒体数据流。 处理器执行组指令以从寄存器文件（110）读取媒体数据流的多个数据元素，以对数据元素执行包括能够动态划分数据的组整数和组浮点运算的组操作 通过每个指定多个数据元素大小中的一个，并将连接的结果写入寄存器文件。

    MASKS FOR LITHOGRAPHIC PATTERNING USING OFF-AXIS ILLUMINATION
    144.
    发明公开
    MASKS FOR LITHOGRAPHIC PATTERNING USING OFF-AXIS ILLUMINATION 失效
    PRODUCING平版印刷图案利用光板岩面罩

    公开(公告)号：EP0744044A1

    公开(公告)日：1996-11-27

    申请号：EP95909535.0

    申请日：1995-02-09

    Applicant: MicroUnity Systems Engineering, Inc.

    Inventor： CHEN, Jang, Fung ,  MATTHEWS, James, A.

    IPC: G03F1 ,  G03F7

    CPC classification number: G03F1/36 ,  G03F7/70125 ,  G03F7/70433

    Abstract: In a lithographical tool utilizing off-axis illumination, masks to provide increased depth of focus and minimize CD differences between certain features are disclosed. A first mask for reducing proximity effects between isolated and densely packed features and increasing depth of focus (DOF) of isolated features is disclosed. The first mask comprises additional lines (214) referred to as scattering bars, disposed next to isolated edges. The bars are spaced a distance from isolated edges such that isolated and densely packed edge gradients substantially match so that proximity effects become negligible. The width of the bars is set so that a maximum DOF range for the isolated feature is achieved. A second mask, that is effective with quadrupole illumination only, is also disclosed. This mask 'boosts' intensity levels and consequently DOF ranges for smaller square contacts so that they approximate intensity levels and DOF ranges of larger elongated contacts. Increasing the intensity levels in smaller contacts reduces critical dimension differences between variably sized contact patterns when transferred to a resist layer. The second mask comprises additional openings, referred to as anti-scattering bars, disposed about the square contact openings. The amount of separation between the edge of the smaller contact and the anti-scattering bars determines the amount of increased intensity. The width of the anti-scattering bars determines the amount of increase in DOF range. Both scattering bar and anti-scattering bars are designed to have widths significantly less than the resolution of the exposure tool so that they do not produce a pattern during exposure of photoresist.

    A BURST MODE MEMORY ACCESSING SYSTEM
    145.
    发明公开
    A BURST MODE MEMORY ACCESSING SYSTEM 失效
    SHOCK操作存储器系统

    公开(公告)号：EP0701733A1

    公开(公告)日：1996-03-20

    申请号：EP94919985.0

    申请日：1994-04-28

    Applicant: MicroUnity Systems Engineering, Inc.

    Inventor： ROBINSON, Timothy, B. ,  CAMPBELL, John, G. ,  HANSEN, Craig, C.

    IPC: G11C11 ,  G11C5 ,  G11C7 ,  G11C29

    CPC classification number: G11C7/1039 ,  G11C5/025

    Abstract: A large burst mode memory (10) accessing system (15) includes N discrete sub-memories (11, 12) and three main I/O ports (17, 18, 19). Data is stored in the sub-memories so that the sub-memories (11, 12) are accessed depending on their proximity to the main I/O ports (17, 18, 19). Three parallel pipelines (1, 2, 3) provide a data path to/from the main I/O ports (17, 18, 19) and the sub-memories (11, 12). The first pipeline (1) functions to couple address/control signals to the memories such that adjacent sub-memories are accessed in half cycle intervals. The second pipeline (2) functions to propagate accessed data from the sub-memories to the main I/O ports such that data is outputted from the main output port every successive clock cycle. The third pipeline (3) propagates write data to the memories such that data presented at the input of the third pipeline on successive clock cycles is written into successive sub-memories. Redundancy circuits preserve data integrity without memory access interruption.

    System with wide operand architecture, and method
    149.
    发明公开
    System with wide operand architecture, and method 有权
    具有宽操作数体系结构的系统和方法

    公开(公告)号：EP2241968A3

    公开(公告)日：2010-11-03

    申请号：EP10160103.7

    申请日：1999-08-24

    Applicant: MicroUnity Systems Engineering, Inc.

    Inventor： Hansen, Craig

    IPC: G06F9/30 ,  G06F9/302 ,  G06F9/318 ,  G06F9/38

    CPC classification number: G06F9/30014 ,  G06F9/30007 ,  G06F9/30021 ,  G06F9/30029 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/30043 ,  G06F9/30101 ,  G06F9/30109 ,  G06F9/30112 ,  G06F9/30145 ,  G06F9/3016 ,  G06F9/30167 ,  G06F9/32 ,  G06F9/34 ,  G06F9/3824 ,  G06F9/383 ,  G06F9/3885 ,  G06F12/0886

    Abstract: A general purpose processor with four copies of an access unit, with an access instruction fetch queue A-queue (101-104). Each A-queue (101-104) is coupled to an access register file AR (105-108) which is coupled to two access functional units A (109-116). In a typical embodiment, each thread of the processor may have on the order of sixty-four general purpose registers. The access unit functions independently by four simultaneous threads of execution, and each compute control flow by performing arithmetic and branch instructions and access memory by performing load and store instructions. These access units also provide wide specifiers for wide operand instructions. These eight access functional units A (109-116) produce results for access register files (105-108) and memory addresses to a shared memory system (117-120).

    Abstract translation: 具有四个访问单元副本的通用处理器，具有访问指令获取队列A队列（101-104）。 每个A队列（101-104）耦合到耦合到两个访问功能单元A（109-116）的访问寄存器文件AR（105-108）。 在典型的实施例中，处理器的每个线程可以具有大约64个通用寄存器的顺序。 访问单元由四个并发执行线程独立运行，每个计算控制流程通过执行算术和分支指令以及通过执行加载和存储指令来访问存储器。 这些访问单元还为宽操作数指令提供宽范围的指定符。 这八个访问功能单元A（109-116）产生访问寄存器文件（105-108）和存储器地址到共享存储器系统（117-120）的结果。

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