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公开(公告)号：KR1020130070728A
公开(公告)日：2013-06-28
申请号：KR1020110137887
申请日：2011-12-20
Applicant: 한국과학기술원
CPC classification number: H01L2224/16145
Abstract: PURPOSE: A three-dimensional stacked integrated circuit is provided to prevent damage of a package, by forming a plurality of penetration silicon vias at each edge of a plurality of semiconductor chips. CONSTITUTION: A plurality of semiconductor chips (110) is stacked on a base substrate (100). The semiconductor chips are conducted through a plurality of penetration silicon vias (210, 220). The penetration silicon vias are formed at each edge of the semiconductor chips. The penetration silicon vias are electrically connected to a conductive pattern. The conductive pattern is formed on the upper surface of the base substrate.
Abstract translation: 目的：通过在多个半导体芯片的每个边缘处形成多个穿透硅通孔，提供三维堆叠集成电路以防止封装的损坏。 构成：多个半导体芯片（110）堆叠在基底（100）上。 半导体芯片通过多个穿透硅通孔（210,220）传导。 穿透硅通孔形成在半导体芯片的每个边缘处。 穿透硅通孔电连接到导电图案。 导电图案形成在基底基板的上表面上。
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公开(公告)号：KR101242740B1
公开(公告)日：2013-03-12
申请号：KR1020110004261
申请日：2011-01-14
Applicant: 한국과학기술원
Abstract: 본 발명은 전류 센서를 이용한 자동제어 역전류 차폐장치에 관한 것으로서, 더욱 상세하게는 전류가 흐르는 전선 주변에 역방향 전류를 흐르게 하여 전자파를 차폐하되, 전류 센서를 이용하여 역방향 전류를 지속적으로 자동 제어하는 장치에 관한 것이다.
본 발명은 전류가 흐르는 전선 주변에 역방향 전류를 흐르게 함으로써 전자파를 차폐하며, 또한 발생하는 전류를 지속적으로 측정하여 자동으로 역방향 전류를 최적으로 제어함으로써 전자파의 발생을 최소화하도록 한다.-
公开(公告)号：KR1020130024113A
公开(公告)日：2013-03-08
申请号：KR1020110087360
申请日：2011-08-30
Applicant: 한국과학기술원
CPC classification number: Y02T10/7005 , B60L11/1824 , H05K9/0075
Abstract: PURPOSE: A vertically movable shielding apparatus of magnetic fields for electronic vehicles is provided to vertically move magnetic flux leakage. CONSTITUTION: A current collector is arranged in the lower portion of an electric vehicle for collecting electricity. Magnetic flux leakages are positioned at both sides of the current collector. A moving unit moves the magnetic flux leakages upward and downward. The moving unit is operated and inserted into the inside of the electric vehicle during driving. [Reference numerals] (AA) Vertically movable loop type magnetic shielding apparatus; (BB) Vehicle body; (CC,FF) Magnetic flux leakage; (DD) Current collector; (EE) Wheel
Abstract translation: 目的：提供一种用于电子车辆的可垂直移动的磁场屏蔽装置，用于垂直移动磁通泄漏。 构成：集电器布置在电动车辆的下部用于收集电力。 磁通泄漏位于集电器的两侧。 移动单元向上和向下移动磁通量泄漏。 移动单元在驾驶时被操作并插入到电动车辆的内部。 （附图标记）（AA）可动圈式磁屏蔽装置; （BB）车体; （CC，FF）磁通泄漏; （DD）集电器; （EE）车轮
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公开(公告)号：KR1020130013418A
公开(公告)日：2013-02-06
申请号：KR1020110075052
申请日：2011-07-28
Applicant: 한국과학기술원
Abstract: PURPOSE: An automatic variable capacitance condenser is provided to automatically control a condenser value for obtaining a resonance point from a desired frequency, thereby obtaining an optimized resonance point in an LC circuit. CONSTITUTION: Two electrodes(10) are faced with each other. Intervals of the electrodes are broadened and narrowed by using a worm gear and a motor. An end part of an electrode is sharply formed. A resonant circuit is formed by combining a coil and a condenser in series or parallel.
Abstract translation: 目的：提供一种自动可变电容电容器，用于自动控制电容器的值，以从期望的频率获得谐振点，从而在LC电路中获得优化的谐振点。 构成：两个电极（10）彼此面对。 通过使用蜗轮和电动机，电极的间隔变宽和变窄。 电极的端部尖锐地形成。 通过串联或并联组合线圈和冷凝器形成谐振电路。
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公开(公告)号：KR101210343B1
公开(公告)日：2012-12-10
申请号：KR1020060087006
申请日：2006-09-08
CPC classification number: H04L1/005 , H04B7/15592 , H04L1/0066 , H04L1/0069 , H04L1/0077 , H04L2001/0097
Abstract: 중계네트워크에서송신국, 중계국, 수신국이모두동일하게길쌈터보부호를이용함으로써중계네트워크에서의데이터중계성능을향상시키는데이터중계방법및 데이터중계시스템을개시한다. 데이터중계방법은, 길쌈터보부호를이용하여상기데이터를터보부호어로부호화하고, 상기터보부호어를제1 천공하여송신국에서중계국및 수신국으로송신하는단계와, 상기중계국으로수신된상기제1 천공된터보부호어를복호화하고, 상기복호화된터보부호어를제2 천공하여상기중계국에서상기수신국으로송신하는단계, 및상기송신국및 상기중계국으로부터상기수신국으로각각수신되는터보부호어를하나의터보부호어로합산하고, 상기합산된터보부호어를복호화하여상기데이터를복원하는단계를포함하는것을특징으로한다.
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Patent Agency Ranking
公开(公告)号：KR101209458B1
公开(公告)日：2012-12-07
申请号：KR1020100134135
申请日：2010-12-24
Applicant: 한국과학기술원
CPC classification number: H01L2224/06181 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225
Abstract: 관통실리콘비아의신호특성을개선하기위한반도체칩이개시된다. 반도체칩은기판, 관통실리콘비아(through silicon via) 및저항구조물을포함한다. 관통실리콘비아는기판의일면과다른일면을관통하여형성된다. 저항구조물은기판과관통실리콘비아사이에도전성패턴들을통하여전기적으로연결된다. 따라서, 반도체칩을통하여전송되는입출력신호의전압여유및 타이밍여유가개선될수 있다.
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公开(公告)号：KR1020120072577A
公开(公告)日：2012-07-04
申请号：KR1020100134395
申请日：2010-12-24
Applicant: 한국과학기술원
IPC: H01L23/48
CPC classification number: H01L2224/32145 , H01L2224/48091 , H01L2224/73265 , H01L2924/00014
Abstract: PURPOSE: A deep N-well guard ring and a 3D integrated circuit including the same are provided to reduce power noise of the 3D integrated circuit due to high frequency signals by connecting the deep N-well guard ring located around the through silicon via to a power source. CONSTITUTION: An N-well region(550) is formed on one side of a semiconductor chip and is formed around a through silicon via(510). An N type impurity region(540) is formed on the N-well region. A guard ring electrode is formed on the N type impurity region. A depletion region(560) is formed around the N-well region of the semiconductor chip.
Abstract translation: 目的：提供一个深N阱保护环和一个包含其的3D集成电路，以通过将穿过硅通孔周围的深N阱保护环连接到一个高频信号来降低3D集成电路的功率噪声 能量源。 构成：在半导体芯片的一侧上形成有N阱区域（550），并且形成在贯穿硅通孔（510）的周围。 在N阱区域上形成N型杂质区（540）。 在N型杂质区形成保护环电极。 在半导体芯片的N阱区域周围形成耗尽区（560）。
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公开(公告)号：KR1020120071538A
公开(公告)日：2012-07-03
申请号：KR1020100133124
申请日：2010-12-23
Applicant: 한국과학기술원
IPC: G01R19/165
Abstract: PURPOSE: A current measuring element for a three dimensional integrated circuit, a method for manufacturing the same, and a current measuring circuit including the same are provided to reduce the size of a current measuring element by forming a coil type conductive path around a conductive pattern in a redistribution layer. CONSTITUTION: A current measuring element(100) comprises a first conductive pattern(110) and a second conductive pattern(120). The first conductive pattern is formed on a first side of a substrate. The second conductive pattern is formed in a redistribution layer located in a second side of the substrate to constitute a coil type conductive path around the first conductive pattern. The current measuring element measures the intensity of input current based on induced current formed in the coil type conductive path in response to the input current flowing in the first conductive pattern.
Abstract translation: 目的：提供一种用于三维集成电路的电流测量元件，其制造方法和包括该电流测量电路的电流测量电路，以通过在导电图案周围形成线圈型导电路径来减小电流测量元件的尺寸 在再分配层。 构成：电流测量元件（100）包括第一导电图案（110）和第二导电图案（120）。 第一导电图案形成在基板的第一侧上。 第二导电图案形成在位于基板的第二侧的再分布层中，以构成围绕第一导电图案的线圈型导电路径。 电流测量元件响应于在第一导电图案中流动的输入电流，基于在线圈型导电路径中形成的感应电流来测量输入电流的强度。
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公开(公告)号：KR1020120007775A
公开(公告)日：2012-01-25
申请号：KR1020100068470
申请日：2010-07-15
Applicant: 한국과학기술원
CPC classification number: G06F17/50 , B60L5/005 , B60L11/182 , B60L2200/26 , B60L2250/16 , B60L2270/147 , B60M7/003 , H02J5/005 , H02J7/025 , H02J50/12 , H02J50/40 , H02J50/70 , Y02T10/7005 , Y02T10/7072 , Y02T90/122 , Y02T90/14
Abstract: PURPOSE: A power collection and supply apparatus design method and an apparatus thereof are provided to introduce a phase delay between power-lines arranged along a traveling direction of a vehicle, thereby improving power transmission efficiency. CONSTITUTION: A distance between a power supply apparatus and a power collection apparatus is inputted(S401). A power supply and collection core width is determined based on the distance between the power supply apparatus and the power collection apparatus(S411). The size of power to be supplied to the power supply apparatus is determined based on a value required with respect to the size of a magnetic field(S412). A arrangement method of a wire which supplies the power to the power supply apparatus is determined(S413).
Abstract translation: 目的：提供一种集电供应装置设计方法及其装置，以引入沿车辆行进方向布置的电力线之间的相位延迟，从而提高电力传输效率。 构成：输入电源装置与集电装置之间的距离（S401）。 基于供电装置和电力收集装置之间的距离来确定供电和收集芯宽度（S411）。 基于对磁场尺寸所需的值，确定供给到电源装置的电力的大小（S412）。 确定向电源装置供电的导线的布置方法（S413）。
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公开(公告)号：KR1020110042393A
公开(公告)日：2011-04-27
申请号：KR1020090099036
申请日：2009-10-19
Applicant: 에스케이하이닉스 주식회사 , 한국과학기술원
CPC classification number: H01L2224/14181 , H01L2224/16145 , H01L2224/32145 , H01L2224/73204 , H01L2924/00012
Abstract: PURPOSE: A semiconductor device having the silicon penetrating via structure is provided to alleviate the capacitive effect of TSV structure by using the ohmic contact. CONSTITUTION: A chip penetrating via(TSV) is inserted into the semiconductor wafer. An insulation layer is arranged around the chip penetration via to separate the semiconductor wafer and the chip penetration via. The ohmic contact layer is arranged in order to surround the chip penetration via on the surface part of the semiconductor wafer. The connection wiring electrically connects the chip penetration via and the ohmic contact layer.
Abstract translation: 目的：提供具有硅穿透结构的半导体器件，以通过使用欧姆接触来减轻TSV结构的电容效应。 构成：穿透通孔（TSV）的芯片插入半导体晶片。 绝缘层布置在芯片穿透通孔周围以分离半导体晶片和芯片穿透通孔。 欧姆接触层被布置为围绕半导体晶片的表面部分上的芯片穿透通孔。 连接布线将芯片穿透通孔和欧姆接触层电连接。
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