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    Method for manufacturing minute silicon mechanical device
    151.
    发明授权
    Method for manufacturing minute silicon mechanical device 失效
    微晶硅机械装置的制造方法

    公开(公告)号：US5981308A

    公开(公告)日：1999-11-09

    申请号：US887927

    申请日：1997-07-03

    Applicant: Seok-Soo Lee

    Inventor： Seok-Soo Lee

    IPC: C25F3/12 ,  B81B3/00 ,  H01L21/306 ,  H01L21/3063 ,  H01L49/00 ,  H01L21/00 ,  H01L21/76

    CPC classification number: B81C1/0015 ,  B81B2203/0136 ,  B81C2201/0114 ,  B81C2201/0136

    Abstract: A method for manufacturing a minute silicon mechanical device, which includes the steps of forming a diffusion region by doping a predetermined portion of a silicon substrate with an impurity of high density; forming an epitaxial layer over the silicon substrate including the diffusion region and forming an oxide layer over the epitaxial layer; forming an ohmic contact layer at the lower surface of the silicon substrate; patterning the oxide layer to have a striped configuration at that portion of the oxide layer corresponding to the predetermined portion of the diffusion region, thus exposing a predetermined portion of the epitaxial layer; forming a plurality of beams having a striped configuration by etching the exposed portion of the epitaxial layer, using the oxide layer as a mask and then removing the oxide layer; and removing the diffusion region below the plurality of beams.

    Abstract translation: 一种微硅机械装置的制造方法，其特征在于，包括以下步骤：通过用高密度的杂​​质掺杂硅衬底的预定部分来形成扩散区; 在包括所述扩散区的所述硅衬底上形成外延层，并在所述外延层上形成氧化物层; 在硅衬底的下表面处形成欧姆接触层; 在氧化物层的与扩散区域的预定部分相对应的部分处，使氧化物层图形化，从而暴露出外延层的预定部分; 通过使用所述氧化物层作为掩模蚀刻所述外延层的暴露部分，然后除去所述氧化物层，形成具有条纹构造的多个光束; 以及去除多个光束下方的扩散区域。

    Method of manufacturing a semiconductor accelerometer
    152.
    发明授权
    Method of manufacturing a semiconductor accelerometer 失效
    制造半导体加速度计的方法

    公开(公告)号：US5656512A

    公开(公告)日：1997-08-12

    申请号：US457643

    申请日：1995-05-31

    Applicant: Bruce Allan Beitman

    Inventor： Bruce Allan Beitman

    IPC: G01P15/12 ,  B81B3/00 ,  G01P15/08 ,  H01L21/306 ,  H01L29/84 ,  H01L21/3213

    CPC classification number: B81C1/0015 ,  G01P15/0802 ,  B81B2201/0235 ,  B81B2203/0315 ,  B81C2201/0104 ,  B81C2201/0136 ,  B81C2201/019 ,  B81C2201/0191 ,  G01P2015/0828

    Abstract: A semiconductor accelerometer is formed by attaching a semiconductor layer to a handle wafer by a thick oxide layer. Accelerometer geometry is patterned in the semiconductor layer, which is then used as a mask to etch out a cavity in the underlying thick oxide. The mask may include one or more apertures, so that a mass region will have corresponding apertures to the underlying oxide layer. The structure resulting from an oxide etch has the intended accelerometer geometry of a large volume mass region supported in cantilever fashion by a plurality of piezo-resistive arm regions to a surrounding, supporting portion of the semiconductor layer. Directly beneath this accelerometer geometry is a flex-accommodating cavity realized by the removal of the underlying oxide layer. The semiconductor layer remains attached to the handle wafer by means of the thick oxide layer that surrounds the accelerometer geometry, and which was adequately masked by the surrounding portion of the top semiconductor layer during the oxide etch step. In a second embodiment support arm regions are dimensioned separately from the mass region, using a plurality of buried oxide regions as semiconductor etch stops.

    Abstract translation: 半导体加速度计是通过用厚的氧化物层将半导体层附着在手柄晶片上形成的。 加速度传感器几何形状在半导体层中图案化，然后将其用作掩模以蚀刻下面的厚氧化物中的空腔。 掩模可以包括一个或多个孔，使得质量区域将具有到下面的氧化物层的对应的孔。 由氧化物蚀刻产生的结构具有通过多个压阻臂区域以半悬臂方式支撑到半导体层的周围的支撑部分的大体积质量区域的预期加速度计几何形状。 直接在该加速度计几何形状之下的是通过去除下面的氧化物层而实现的柔性容纳腔。 半导体层通过围绕加速度计几何形状的厚氧化物层保持附着到处理晶片，并且在氧化物蚀刻步骤期间，半导体层被顶部半导体层的周围部分充分掩蔽。 在第二实施例中，使用多个掩埋氧化物区域作为半导体蚀刻停止件，将支撑臂区域与质量区域分开设计。

    Semiconductor device with force and/or acceleration sensor
    153.
    发明授权
    Semiconductor device with force and/or acceleration sensor 失效
    具有力和/或加速度传感器的半导体器件

    公开(公告)号：US5554875A

    公开(公告)日：1996-09-10

    申请号：US486156

    申请日：1995-06-07

    Applicant: Siegbert Hartauer

    Inventor： Siegbert Hartauer

    IPC: B81B3/00 ,  G01L1/18 ,  G01P15/08 ,  G01P15/12 ,  G01P15/125 ,  H01L29/82

    CPC classification number: B81C1/00246 ,  G01L1/18 ,  G01P15/0802 ,  G01P15/123 ,  G01P15/125 ,  B81B2201/0235 ,  B81B2203/0109 ,  B81B2203/0315 ,  B81C2201/0136 ,  B81C2201/014 ,  B81C2203/0728 ,  B81C2203/0735

    Abstract: A semiconductor device with a force and/or acceleration sensor (12), which has a spring-mass system (14, 16) responsive to the respective quantity to be measured and whose mass (16) bears via at least one resilient support element (14) on a semiconductor substrate (20). The semiconductor substrate (20) and the spring-mass system (14, 16) are integral components of a monocrystalline semiconductor crystal (10) with a IC-compatible structure. The three-dimensional structural form of the spring-mass system (12) is produced by anisotropic semiconductor etching, defined P/N junctions of the semiconductor layer arrangement functioning as etch stop means in order to more particularly create a gap (22) permitting respective movement of the mass (16) between the mass (16) and the semiconductor substrate (20).

    Abstract translation: 一种具有力和/或加速度传感器（12）的半导体器件，其具有响应于待测量的相应量的弹簧质量系统（14,16），并且其质量（16）经由至少一个弹性支撑元件（ 14）在半导体衬底（20）上。 半导体衬底（20）和弹簧质量系统（14,16）是具有IC兼容结构的单晶半导体晶体（10）的组成部分。 通过各向异性半导体蚀刻制造弹簧质量体系（12）的三维结构形式，作为蚀刻停止装置的半导体层布置的限定的P / N结，以更具体地形成允许相应的间隙（22） 质量块（16）和半导体衬底（20）之间的质量块（16）的移动。

    Method of forming a microstructure with bare silicon ground plane
    154.
    发明授权
    Method of forming a microstructure with bare silicon ground plane 失效
    用裸硅接地层形成微结构的方法

    公开(公告)号：US5543013A

    公开(公告)日：1996-08-06

    申请号：US348374

    申请日：1994-12-01

    Applicant: Robert W. K. Tsang ,  Jeffrey A. Farash ,  Richard S. Payne

    Inventor： Robert W. K. Tsang ,  Jeffrey A. Farash ,  Richard S. Payne

    IPC: B81B3/00 ,  G01P15/08 ,  G01P15/125 ,  H01L21/00

    CPC classification number: B81C1/0015 ,  G01P15/0802 ,  G01P15/125 ,  B81C2201/0136 ,  G01P2015/0814

    Abstract: A method for providing a conductive ground plane beneath a suspended microstructure. A conductive region is diffused into a substrate. Two dielectric layers are added: first a thermal silicon dioxide layer and then a silicon nitride layer. A first mask is used to etch a ring partially through the silicon nitride layer. Then, a second mask is used to etch a hole through both dielectric layers in a region having a perimeter that extends between the inner and outer edges of the ring. This leaves the conductive region exposed in an area surrounded by a ring that has the silicon dioxide layer and a narrow silicon nitride layer. The ring is surrounded by an area in which the silicon dioxide and silicon nitride layers have not been reduced. A spacer silicon dioxide layer is deposited over the dielectric and then a polysilicon layer is deposited and formed into the shape of a the suspended microstructure. When the spacer layer is etched away, the silicon dioxide under the narrow silicon nitride layer is removed, along with the narrow silicon nitride layer, leaving an exposed ground plane surrounded by a dielectric with minimal undercutting.

    Abstract translation: 一种用于在悬浮微结构下面提供导电接地平面的方法。 导电区域扩散到衬底中。 加入两个电介质层：首先是热二氧化硅层，然后是氮化硅层。 使用第一掩模来部分地蚀刻环通过氮化硅层。 然后，使用第二掩模在具有在环的内边缘和外边缘之间延伸的周边的区域中的两个电介质层上蚀刻孔。 这使得导电区域暴露在由具有二氧化硅层和窄氮化硅层的环包围的区域中。 环被二氧化硅和氮化硅层未被还原的区域包围。 在电介质上沉积间隔二氧化硅层，然后沉积多晶硅层并将其形成为悬浮微结构的形状。 当蚀刻间隔层时，与窄氮化硅层一起除去窄氮化硅层下面的二氧化硅，留下暴露的接地平面，其中包含极少的底切电介质。

    Etch control seal for dissolved wafer process
    155.
    发明授权
    Etch control seal for dissolved wafer process 失效
    用于溶解晶片工艺的蚀刻控制密封

    公开(公告)号：US5509974A

    公开(公告)日：1996-04-23

    申请号：US434153

    申请日：1995-05-02

    Applicant: Kenneth M. Hays

    Inventor： Kenneth M. Hays

    IPC: C23F1/00 ,  B81C1/00 ,  G01L9/00 ,  H01L21/306 ,  H03H3/007 ,  H01L29/12

    CPC classification number: G01L9/0019 ,  B81C1/00801 ,  H03H3/007 ,  B81C2201/0136 ,  B81C2201/014 ,  Y10S148/012

    Abstract: A dissolved wafer process is modified by providing an etch control seal around the perimeter of an etch resistant microstructure, such as a micromechanical or microelectromechanical device, formed on a first substrate. The microstructure is defined and shaped by a surrounding trench in the first substrate. Selected areas of the microstructure and the first substrate are bonded to an etch resistant second substrate. The selected bonding areas may comprise raised areas of the first substrate, or raised areas of the second substrate corresponding to the selected bonding areas of the first substrate. A bonded area forming a ring extending around the perimeter of the microstructure and its defining trench forms an etch control seal. The first substrate of the bonded assembly is dissolved in a selective etch so that the etch resistant microstructure remains attached to the second substrate only at the bonded areas. The etch control seal reduces exposure of the microstructure to the etch by preventing the etch from contacting the microstructure until the etch leaks through the dissolving floor of the trench. This occurs only during the final stages of the wafer dissolution step, thus minimizing exposure of the microstructure to the damaging effects of the etch.

    Abstract translation: 通过在第一衬底上形成的耐蚀刻微结构（例如微机电或微机电装置）的周边周围提供蚀刻控制密封来改变溶解的晶片工艺。 微结构由第一衬底中的周围沟槽限定和成形。 将微结构和第一衬底的选定区域结合到耐蚀刻的第二衬底上。 所选择的结合区域可以包括第一衬底的凸起区域或者对应于第一衬底的所选择的结合区域的第二衬底的凸起区域。 形成围绕微结构周边延伸的环的结合区及其限定沟槽形成蚀刻控制密封。 粘合组件的第一衬底被溶解在选择性蚀刻中，使得耐蚀刻微结构仅在接合区域处附着到第二衬底。 蚀刻控制密封件通过防止蚀刻与微结构接触直到蚀刻泄漏通过沟槽的溶解底板来减少微结构暴露于蚀刻。 这仅发生在晶片溶解步骤的最后阶段期间，从而最小化微观结构暴露于蚀刻的破坏作用。

    Pressure transducer and method for fabricating same
    157.
    发明授权
    Pressure transducer and method for fabricating same 失效
    压力传感器及其制造方法

    公开(公告)号：US4838088A

    公开(公告)日：1989-06-13

    申请号：US74893

    申请日：1987-07-16

    Applicant: Koichi Murakami

    Inventor： Koichi Murakami

    IPC: H01L29/84 ,  B81B3/00 ,  G01L7/00 ,  G01L9/00 ,  G01L9/04 ,  H01L21/306

    CPC classification number: B81B3/0021 ,  G01L9/0055 ,  G01L9/0073 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81B2203/0353 ,  B81C2201/0136

    Abstract: A pressure transducer is composed of a substrate, a pressure sensing diaphragm layer and a support layer interposed between the substrate and the diaphragm layer, and a transduction element for coverting a displacement of the diaphragm layer into an electric signal. The support layer has an opening which is hermetically sandwiched between the substrate and the diaphragm layer so that there is formed sealed internal cavity used as a built-in reference pressure chamber. Preferably, the diaphragm layer includes a perforated inner layer extending over the cavity and a cover layer formed on the inner layer so as to seal the cavity. This transducer is fabricated by a process including a first step of forming the support layer on the substrate, a second step of forming the inner layer of the diaphragm layer on the support layer and forming perforations in the inner layer by etching, a third step of forming the opening in the support layer by etching through the perforations and a fourth step of forming the cover layer on the perforated inner layer to seal the internal cavity.

    Abstract translation: 压力传感器由衬底，压力感测膜层和介于衬底和隔膜层之间的支撑层组成，以及用于将隔膜层移位成电信号的换能元件。 支撑层具有气密地夹在基板和隔膜层之间的开口，从而形成用作内置基准压力室的密封内部空腔。 优选地，隔膜层包括在空腔上延伸的穿孔内层和形成在内层上以便密封空腔的覆盖层。 该传感器通过包括在基板上形成支撑层的第一步骤的工艺制造，第二步骤，在支撑层上形成隔膜层的内层并通过蚀刻在内层中形成穿孔;第三步骤 通过穿过所述穿孔而形成所述支撑层中的所述开口;以及第四步骤，在所述穿孔内层上形成所述覆盖层以密封所述内部空腔。

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