公开(公告)号：US20040099928A1

公开(公告)日：2004-05-27

申请号：US10306639

申请日：2002-11-27

Inventor： Thomas K. Nunan ,  David E. Grosjean ,  Denis M. O'Kane ,  James S. Sellars

IPC: H01L021/76

CPC classification number: B81C1/00595 ,  B81C1/00698 ,  B81C2201/0109 ,  B81C2201/0142 ,  B81C2201/016 ,  B81C2201/019

Abstract: A method of manufacturing MEMS structures and devices that allows the fabrication of dielectric structures with improved etch selectivity and good electrical leakage characteristics. The dielectric structure includes a composite stack of silicon nitride sub-layers with a silicon-rich nitride sub-layer and a stoichiometric silicon nitride sub-layer at opposite ends of the stack. Alternatively, the dielectric structure includes a single silicon nitride layer providing a graded change in silicon content through the dielectric layer, from silicon-rich nitride to stoichiometric silicon nitride.

Abstract translation: 制造MEMS结构和器件的方法，其允许制造具有改进的蚀刻选择性和良好漏电特性的电介质结构。 电介质结构包括在堆叠的相对端处具有富硅氮化物子层和化学计量氮化硅子层的氮化硅子层的复合叠层。 或者，电介质结构包括单个氮化硅层，其通过介电层提供硅含量的梯度变化，从富含硅的氮化物到化学计量的氮化硅。

公开(公告)号：US20030235932A1

公开(公告)日：2003-12-25

申请号：US10161191

申请日：2002-05-28

Applicant: Silicon Light Machines

Inventor： James A. Hunter

IPC: H01L021/00

CPC classification number: G02B26/0808 ,  B81B2201/045 ,  B81B2207/015 ,  B81B2207/07 ,  B81C1/00246 ,  B81C2201/016 ,  B81C2203/0735 ,  B81C2203/0778 ,  H01L27/0611

Abstract: An integrated device including one or more device drivers and a diffractive light modulator monolithically coupled to the one or more driver circuits. The one or more driver circuits are configured to process received control signals and to transmit the processed control signals to the diffractive light modulator. A method of fabricating the integrated device preferably comprises fabricating a front-end portion for each of a plurality of transistors, isolating the front-end portions of the plurality of transistors, fabricating a front-end portion of a diffractive light modulator, isolating the front end portion of the diffractive light modulator, fabricating interconnects for the plurality of transistors, applying an open array mask and wet etch to access the diffractive light modulator, and fabricating a back-end portion of the diffractive light modulator, thereby monolithically coupling the diffractive light modulator and the plurality of transistors.

Abstract translation: 包括一个或多个器件驱动器和单片耦合到所述一个或多个驱动器电路的衍射光调制器的集成器件。 一个或多个驱动器电路被配置为处理接收到的控制信号并将经处理的控制信号传送到衍射光调制器。 一种制造集成器件的方法优选包括制造用于多个晶体管中的每一个晶体管的前端部分，隔离多个晶体管的前端部分，制造衍射光调制器的前端部分，将前部 衍射光调制器的端部，制造用于多个晶体管的互连，施加开放阵列掩模和湿蚀刻以访问衍射光调制器，以及制造衍射光调制器的后端部分，从而将衍射光 调制器和多个晶体管。

公开(公告)号：US20030003619A1

公开(公告)日：2003-01-02

申请号：US09895127

申请日：2001-06-29

Inventor： Paul Winer ,  George P. Vakanas

IPC: H01L021/00

CPC classification number: H01L21/00 ,  B01L3/5027 ,  B81B2201/058 ,  B81B2203/0338 ,  B81C1/00714 ,  B81C2201/016 ,  Y10S438/94 ,  Y10S438/958

Abstract: A method and apparatus for rapid prototyping and fabrication of passivated microfluidic structures is disclosed. The method and apparatus may be used to fabricate and passivate the microfluidic channel in one system.

Abstract translation: 公开了用于快速成型和制造钝化微流体结构的方法和装置。 该方法和装置可用于在一个系统中制造和钝化微流体通道。

公开(公告)号：US20020086455A1

公开(公告)日：2002-07-04

申请号：US10027044

申请日：2001-12-20

Inventor： Martin Franosch ,  Reinhard Wittmann ,  Catharina Pusch

IPC: H01L021/00

CPC classification number: B81C1/00476 ,  B81C1/00047 ,  B81C2201/016

Abstract: A method for the manufacture of micro-mechanical components from a stack of layers having at least a substrate, a sacrificial layer and a layer which is to be undercut includes forming at least one etch hole in the layer, which is to be undercut, and providing at least one passivation layer for controlling a selective depositing of a cover material which closes each of the etch holes after a step of etching the sacrificial layer. The passivation layer makes it possible that the undercut layer elements do not become excessively thick or grow together with the substrate due to the deposition of the cover material.

Abstract translation: 用于从具有至少衬底，牺牲层和待切削层的层的堆叠制造微机械部件的方法包括在该底层中形成待切削的至少一个蚀刻孔;以及 提供至少一个钝化层，用于控制在蚀刻牺牲层的步骤之后关闭每个蚀刻孔的覆盖材料的选择性沉积。 钝化层使得底切层元件由于覆盖材料的沉积而不会变得过厚或与基板一起生长。

公开(公告)号：US20010045527A1

公开(公告)日：2001-11-29

申请号：US09827560

申请日：2001-04-05

Inventor： Barry Dean Wissman ,  Lee Walter ,  Roger Lee Hipwell JR. ,  Barbara Ihlow-Mahrer ,  Zine-Eddine Boutaghou

IPC: A61N005/00 ,  G21G005/00

CPC classification number: B81C1/00619 ,  B81C2201/0132 ,  B81C2201/016 ,  G03F7/26 ,  H01L21/0277 ,  H01L21/30655 ,  H01L21/3081

Abstract: This invention presents a method and system for etching a silicon substrate. This includes depositing a non-thermally cured photoresist mask on the upper region of a trench in the silicon substrate. A fluorocarbon film is deposited on the silicon substrate, and the silicon substrate is bombarded with ions. As a result, the fluorocarbon film is preferentially removed from the lower region of the trench in the substrate, and the upper region of the trench is substantially protected by the photoresist mask. This invention can include curing the photoresist mask using an electron-beam system.

Abstract translation: 本发明提出了一种用于蚀刻硅衬底的方法和系统。 这包括在硅衬底的沟槽的上部区域上沉积非热固化的光致抗蚀剂掩模。 在硅衬底上沉积氟碳膜，并用离子轰击硅衬底。 结果，优选地从衬底中的沟槽的下部区域去除氟碳膜，并且沟槽的上部区域被光致抗蚀剂掩模基本上保护。 本发明可以包括使用电子束系统固化光致抗蚀剂掩模。

公开(公告)号：US5792675A

公开(公告)日：1998-08-11

申请号：US730257

申请日：1996-10-15

Applicant: Michael Offenberg

Inventor： Michael Offenberg

IPC: B81B3/00 ,  G01P15/08 ,  G01P15/125 ,  H01L49/00 ,  H01L21/00

CPC classification number: B81B3/0086 ,  B81B3/0035 ,  B81B3/0078 ,  B81C1/00595 ,  G01P15/0802 ,  G01P15/125 ,  B81B2201/0235 ,  B81B2203/0118 ,  B81B2203/0136 ,  B81C2201/0107 ,  B81C2201/0109 ,  B81C2201/016 ,  G01P2015/0814

Abstract: In an accelerometer sensor of crystalline material, whose components are composed partly of monocrystalline and partly of polycrystalline material, a band-shaped seismic mass preferably is composed of polycrystalline material, whose suspension by means of suspension segments of monocrystalline material at the end regions permits a movement in the longitudinal direction upon the occurrence of an acceleration. Parallel plates extend from this mass at right angles to their longitudinal direction and, together with additional plates, which run parallel to said plates and are anchored at a base, form a capacitor arrangement and are composed, in particular, of monocrystalline material. At least the monocrystalline material is doped to attain an electric conductivity. When lightly doped, the long and thin plates and suspension segments have a high conductivity, given a very small mechanical prestressing, and can easily be isotropically undercut. The polycrystalline formation of the seismic mass can be designed to be very wide and large by etching away an underlying sacrificial oxide.

Abstract translation: 在结晶材料的加速度传感器中，其部件部分由单晶组成，部分由多晶材料组成，带状地震质量体优选地由多晶材料组成，其结晶区域的单晶材料悬浮段的悬浮液允许 发生加速时的纵向移动。 平行板从该质量块垂直于其纵向方向延伸，并且与另外的板一起平行于所述板并锚定在基座上，形成电容器布置，并且特别地由单晶材料组成。 至少单晶材料被掺杂以获得导电性。 当轻掺杂时，长且薄的板和悬浮段具有高导电性，给定非常小的机械预应力，并且可以容易地各向同性地切削。 通过蚀刻掉潜在的牺牲氧化物，可以将地震块的多晶形成设计得非常宽和大。

公开(公告)号：US5789264A

公开(公告)日：1998-08-04

申请号：US716761

申请日：1996-09-23

Applicant: Jae-Hyuk Chung

Inventor： Jae-Hyuk Chung

IPC: B81B3/00 ,  G02B5/08 ,  G02B26/08 ,  G03B21/00 ,  H01L21/302 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/316 ,  H01L41/09 ,  H01L21/265

CPC classification number: B81C1/00214 ,  B81B3/0083 ,  G02B26/0858 ,  B81B2201/042 ,  B81B2203/0315 ,  B81B2203/04 ,  B81C2201/0109 ,  B81C2201/014 ,  B81C2201/016

Abstract: An inventive method for the manufacture of an array of thin film actuated mirrors includes the steps of: providing an active matrix; forming a plurality of insulating layers having a planarized top surface on top of the active matrix; forming a thin film sacrificial layer having an array of empty cavities on the planarized top surface of the plurality of insulating layers; forming an array of actuating structures on top of the thin film sacrificial layer including the empty cavities, each of the actuating structures including a first thin film electrode, a thin film electrodisplacive member, a second thin film electrode, an elastic member and a conduit; and removing the thin film sacrificial layer, thereby forming the array of thin film actuated mirrors. Since the thin film layers constituting each of the actuating structures are formed on the planarized top surface of the insulating layers, the thin film layers constituting each of the actuating structures are flat, allowing the first thin film electrode placed on top thereof, which also acts as a mirror, to have a flat top surface, thereby increasing the overall optical efficiency and performance of the array.

Abstract translation: 用于制造薄膜致动反射镜阵列的创新方法包括以下步骤：提供有源矩阵; 在所述有源矩阵的顶部上形成具有平坦化顶表面的多个绝缘层; 在所述多个绝缘层的平坦化顶表面上形成具有空腔阵列的薄膜牺牲层; 在包括空腔的薄膜牺牲层的顶部上形成致动结构的阵列，每个致动结构包括第一薄膜电极，薄膜电致位移元件，第二薄膜电极，弹性元件和导管; 并去除薄膜牺牲层，从而形成薄膜致动反射镜阵列。 由于构成每个致动结构的薄膜层形成在绝缘层的平坦化顶表面上，所以构成每个致动结构的薄膜层是平坦的，允许第一薄膜电极放置在顶部，其也起作用 作为镜子，具有平坦的顶表面，从而增加阵列的整体光学效率和性能。

公开(公告)号：US5578755A

公开(公告)日：1996-11-26

申请号：US348700

申请日：1994-12-02

Applicant: Michael Offenberg

Inventor： Michael Offenberg

IPC: B81B3/00 ,  G01P15/08 ,  G01P15/125 ,  H01L49/00

CPC classification number: B81B3/0086 ,  B81B3/0035 ,  B81B3/0078 ,  B81C1/00595 ,  G01P15/0802 ,  G01P15/125 ,  B81B2201/0235 ,  B81B2203/0118 ,  B81B2203/0136 ,  B81C2201/0107 ,  B81C2201/0109 ,  B81C2201/016 ,  G01P2015/0814

Abstract: In an accelerometer sensor of crystalline material, whose components are composed partly of monocrystalline and partly of polycrystalline material, a band-shaped seismic mass preferably is composed of polycrystalline material, whose suspension by means of suspension segments of monocrystalline material at the end regions permits a movement in the longitudinal direction upon the occurrence of an acceleration. Parallel plates extend from this mass at right angles to their longitudinal direction and, together with additional plates, which run parallel to said plates and are anchored at a base, form a capacitor arrangement and are composed, in particular, of monocrystalline material. At least the monocrystalline material is doped to attain an electric conductivity. When lightly doped, the long and thin plates and suspension segments have a high conductivity, given a very small mechanical prestressing, and can easily be isotropically undercut. The polycrystalline formation of the seismic mass can be designed to be very wide and large by etching away an underlying sacrificial oxide.

Abstract translation: 在结晶材料的加速度传感器中，其部件部分由单晶组成，部分由多晶材料组成，带状地震质量体优选地由多晶材料组成，其结晶区域的单晶材料悬浮段的悬浮液允许 发生加速时的纵向移动。 平行板从该质量块垂直于其纵向方向延伸，并且与另外的板一起平行于所述板并锚定在基座上，形成电容器布置，并且特别地由单晶材料组成。 至少单晶材料被掺杂以获得导电性。 当轻掺杂时，长且薄的板和悬浮段具有高导电性，给定非常小的机械预应力，并且可以容易地各向同性地切削。 通过蚀刻掉潜在的牺牲氧化物，可以将地震块的多晶形成设计得非常宽和大。

公开(公告)号：TW201706204A

公开(公告)日：2017-02-16

申请号：TW105116731

申请日：2016-05-27

Applicant: 施耐普特拉克股份有限公司 ,  SNAPTRACK, INC.

Inventor： 笹川照夫 ,  SASAGAWA, TERUO ,  蔡政憲 ,  CHAE, JUNGHUN ,  史汀 賈斯柏 羅德偉克 ,  STEYN, JASPER LODEWYK ,  原猛 ,  HARA, TAKESHI ,  大和朝日 ,  YAMATO, ASAHI

IPC: B81B7/02 ,  B81C1/00

CPC classification number: B81C1/00698 ,  B81B3/0086 ,  B81B2203/0163 ,  B81B2207/053 ,  B81C2201/016 ,  B81C2201/0181

Abstract: 本發明提供包括器件之系統、方法及裝置，該等器件包括覆蓋一微機電器件內之一薄膜組件之一外部表面之至少一部分的鈍化材料層。該薄膜組件可包括經由一錨定件而連接至一基板上之一導電表面的一導電層。本發明進一步提供用於在一薄膜組件之一外部表面上提供一第一鈍化材料層且用於將彼薄膜組件電連接至一基板上之一導電表面的程序。本發明進一步提供用於在該微機電器件之脫模之後於該薄膜組件之任何曝露表面上提供一第二鈍化材料層的程序。

Abstract in simplified Chinese: 本发明提供包括器件之系统、方法及设备，该等器件包括覆盖一微机电器件内之一薄膜组件之一外部表面之至少一部分的钝化材料层。该薄膜组件可包括经由一锚定件而连接至一基板上之一导电表面的一导电层。本发明进一步提供用于在一薄膜组件之一外部表面上提供一第一钝化材料层且用于将彼薄膜组件电连接至一基板上之一导电表面的进程。本发明进一步提供用于在该微机电器件之脱模之后于该薄膜组件之任何曝露表面上提供一第二钝化材料层的进程。

公开(公告)号：TWI449949B

公开(公告)日：2014-08-21

申请号：TW101122279

申请日：2012-06-21

Applicant: 皮克斯特隆尼斯有限公司 ,  PIXTRONIX, INC.

Inventor： 海東拓生 ,  KAITOH, TAKUO ,  栗谷川武 ,  KURIYAGAWA, TAKESHI ,  阪田亮 ,  SAKATA, RYOU ,  刈入修 ,  KARIKOME, OSAMU ,  布羅斯尼漢 提摩西J ,  BROSNIHAN, TIMOTHY J.

IPC: G02B26/02 ,  G09G3/20

CPC classification number: G02B26/0841 ,  B81B7/007 ,  B81B2201/045 ,  B81C2201/0132 ,  B81C2201/016