A METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE OF SiC
    164.
    发明公开
    A METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE OF SiC 有权
    METHOD FOR PRODUCING SiC构成的半导体部件

    公开(公告)号:EP1258034A1

    公开(公告)日:2002-11-20

    申请号:EP01902922.2

    申请日:2001-01-26

    Applicant: Acreo AB

    Abstract: The invention relates to a method for selective etching of SiC, the etching being carried out by applying a positive potential to a layer (3; 8) of p-type SiC being in contact with an etching solution containing fluorine ions and having an oxidising effect on SiC. The invention also relates to a method for producing a SiC micro structure having free hanging parts (i.e. diaphragm, cantilever or beam) on a SiC-substrate, a method for producing a MEMS device of SiC having a free hanging structure, and a method for producing a piezo-resistive pressure sensor comprising the step of applying a positive potential to a layer (8) of p-type SiC being in contact with an etching solution containing fluorine ions and having an oxidising effect on SiC.

    INERTIA FORCE SENSOR AND METHOD FOR PRODUCING INERTIA FORCE SENSOR
    165.
    发明公开
    INERTIA FORCE SENSOR AND METHOD FOR PRODUCING INERTIA FORCE SENSOR 审中-公开
    TRERGITSKRAFTSENSOR UND VERFAHREN SEINER HERSTELLUNG

    公开(公告)号:EP1087445A1

    公开(公告)日:2001-03-28

    申请号:EP99900292.6

    申请日:1999-01-13

    Abstract: An inertia force sensor having a mass body (11) which moves when force is applied to the sensor, at least one holding beam (12) for holding the mass body (11), and an anchor portion (13) for fixing an end portion of the holding beam (12), the sensor being designed to detect inertia force, which acts on the mass body (11), on the basis of a movement of the mass body (11). The sensor is characterized in that the mass body (11) is composed of a free standing structure (9) which is formed by removing an inner part of a silicon substrate (1) therefrom by means of an etching process within a single step, and the anchor portion (13) is composed of at least a part of a main body of the silicon substrate. Because the inertia force sensor is composed of single crystal silicon, its mechanical properties and reliability may be highly improved.

    Abstract translation: 一种惯性力传感器,其具有在向传感器施加力时移动的质量体(11),用于保持质量体(11)的至少一个保持梁(12),以及用于固定端部的固定部(13) 所述传感器被设计成基于所述质量体(11)的运动来检测作用在所述质量体(11)上的惯性力。 传感器的特征在于,质量体(11)由通过在一个步骤内的蚀刻工艺除去硅衬底(1)的内部而形成的自立式结构(9)构成,以及 锚定部(13)由硅基板的主体的至少一部分构成。 由于惯性力传感器由单晶硅组成,因此其机械性能和可靠性可能得到很大改善。

    Nanostructure, electron emitting device, carbon nanotube device, and method of producing the same
    166.
    发明公开
    Nanostructure, electron emitting device, carbon nanotube device, and method of producing the same 审中-公开
    Nanostruktur,Elektronen emitierende Vorrichtung,KohlenstoffNanoröhrenund Herstellungsverfahrendafür

    公开(公告)号:EP0951047A3

    公开(公告)日:1999-12-29

    申请号:EP99106041.9

    申请日:1999-03-25

    Abstract: The invention provides a nanostructure including an anodized film including nanoholes. The anodized film is formed on a substrate having a surface including at least one material selected from the group consisting of semiconductors, noble metals, Mn, Fe, Co, Ni, Cu and carbon. The nanoholes are cut completely through the anodized film from the surface of the anodized film to the surface of the substrate. The nanoholes have a first diameter at the surface of the anodized film and a second diameter at the surface of the substrate. The nanoholes are characterized in that either a constriction exists at a location between the surface of the anodized film and the surface of the substrate, or the second diameter is greater than the first diameter.

    Abstract translation: 提供了一种制造包括在基板上包括纳米孔的膜的结构的方法,所述纳米孔穿过膜从所述膜的表面到所述基板的表面,其中所述方法包括以下步骤:(i)形成膜 在所述衬底上,(ii)阳极氧化所述膜,其中在步骤(ii)中,当监测阳极氧化电流时进行阳极氧化,并且当检测到来自稳态值的所述阳极氧化电流的减小时,所述膜的阳极氧化终止。

    A method for producing semiconductor device
    167.
    发明公开
    A method for producing semiconductor device 失效
    Verfahren zur Herstellung einer Halbleiteranordnung。

    公开(公告)号:EP0567075A2

    公开(公告)日:1993-10-27

    申请号:EP93106391.1

    申请日:1993-04-20

    Abstract: A method for producing a semiconductor device is capable of solving problems related to dicing a metal thin film used for electrochemical etching.
    According to the method, an n type epitaxial thin layer (36) is formed on a p type single-crystal silicon wafer (35). An n + type diffusion layer (38) is formed in a scribe line area on the epitaxial layer (36). An n + type diffusion layer (39) is formed in an area of the epitaxial layer (36) which corresponds to the predetermined part of the wafter (35). Aluminum film (40, 41) is formed over the diffusion layers (38, 39), respectively. The aluminum film (40) has a clearance (65) for passing a dicing blade (66). Predetermined parts of the wafer (35) are electrochemically etched by supplying electricity through the aluminum film (40), the diffusion layers (38) and (39), to leave predetermined parts of the epitaxial layer (36). The wafer (35) is diced into chips along the scribe line area. Each of the chips forms the semiconductor device.
    The electrochemical etching of the wafer (35) is carried out after the formation of the aluminum film (40, 41), by immersing the wafer (35) in a KOH aqueous solution (76) and by supplying electricity through the aluminum film (40). The electrochemical etching is terminated at an inflection point where an etching current inflects to a constant level from a peak level.
    During the electrochemical etching, the diffusion layer (39) reduces horizontal resistance in the epitaxial layer (36), so that the etched parts receive a sufficient potential to perform the etching.

    Abstract translation: 半导体器件的制造方法能够解决与用于电化学蚀刻的金属薄膜切割相关的问题。 根据该方法,在p型单晶硅晶片(35)上形成n型外延薄层(36)。 在外延层(36)上的划线区域中形成n +型扩散层(38)。 在外延层(36)的对应于浮体(35)的预定部分的区域中形成n +型扩散层(39)。 铝膜(40,41)分别形成在扩散层(38,39)上。 铝膜(40)具有用于通过切割刀片(66)的间隙(65)。 通过供电通过铝膜(40),扩散层(38)和(39)来电蚀刻晶片(35)的预定部分,以留下外延层(36)的预定部分。 将晶片(35)沿着划线区切成芯片。 每个芯片形成半导体器件。 通过将晶片(35)浸渍在KOH水溶液(76)中并通过铝膜(40)供电,在形成铝膜(40,41)之后进行晶片(35)的电化学蚀刻 )。 在蚀刻电流从峰值水平变为恒定水平的拐点处终止电化学蚀刻。 在电化学蚀刻期间,扩散层(39)减小了外延层(36)中的水平电阻,使得蚀刻部分具有足够的电位来进行蚀刻。

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