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    바이폴라 트랜지스터의 제조방법
    12.
    发明授权
    바이폴라 트랜지스터의 제조방법 失效
    双极晶体管的制造方法

    公开(公告)号：KR1019940005449B1

    公开(公告)日：1994-06-18

    申请号：KR1019910004718

    申请日：1991-03-25

    Applicant: 삼성전자주식회사

    Inventor： 김문호 ,  원태영

    IPC: H01L29/70

    Abstract: The method of fabricating bipolar transistor comprises the steps of forming an N-type polysilicon and nitride pattern on an active region, forming a sidewall on the sides of the pattern, selectively growing epitaxial layer between the sidewall and the field oxide, highly doping the epitaxial layer with P-type, performing heat treatment to the polysilicon layer and highly doped epitaxial layer to form emitter and base region, depositing a metal and then heat treating it to form salicide layer, and selectively removing the salicide layer. The method simplifies formation of electrode and improves the transistor performance.

    Abstract translation: 制造双极晶体管的方法包括以下步骤：在有源区上形成N型多晶硅和氮化物图案，在图案的侧面上形成侧壁，在侧壁和场氧化物之间选择性地生长外延层，高度掺杂外延层 具有P型的层，对多晶硅层和高度掺杂的外延层进行热处理以形成发射极和基极区，沉积金属，然后热处理以形成自对准硅化物层，并选择性地除去自对准硅化物层。 该方法简化了电极的形成，提高了晶体管的性能。

    사이드월(side wall)을 이용한 바이폴라 소자의 제조방법
    16.
    发明授权
    사이드월(side wall)을 이용한 바이폴라 소자의 제조방법 失效
    利用侧壁制造双极元件的方法

    公开(公告)号：KR1019940008216B1

    公开(公告)日：1994-09-08

    申请号：KR1019910009857

    申请日：1991-06-14

    Applicant: 삼성전자주식회사

    Inventor： 김문호 ,  함석헌

    IPC: H01L29/72

    Abstract: The method improves reliability of a bipolar transistor by extending the distance between the emitter and the extrinsic base. The method comprises (A) growing n- epitaxial layer (2) on the Si substrate and forming a buried layer and an isolated layer; (B) depositing a polysilicon layer (3) on the epitaxial layer (2) and implanting boron ion; (C) removing the isolated layer by using photolithography and oxidizing the exposed n- epitaxial layer; (D) forming side wall (14) after depositing oxide and nitride layers; (E) heating bases (5,6); (F) masking the nitride side wall and etching the oxide layer; (G) heating the polysilicon layer and forming electrodes by photolithography.

    Abstract translation: 该方法通过扩展发射极和外部基极之间的距离来提高双极晶体管的可靠性。 该方法包括：（A）在Si衬底上生长n-外延层（2）并形成掩埋层和隔离层; （B）在外延层（2）上沉积多晶硅层（3）并注入硼离子; （C）通过使用光刻法去除所述隔离层并氧化所述暴露的n-外延层; （D）在沉积氧化物和氮化物层之后形成侧壁（14）; （E）加热基（5,6）; （F）掩蔽氮化物侧壁并蚀刻氧化物层; （G）加热多晶硅层并通过光刻形成电极。

    BiCMOS 소자의 제조방법
    17.
    发明授权
    BiCMOS 소자의 제조방법 失效
    制造BICMOS器件的方法

    公开(公告)号：KR1019940007466B1

    公开(公告)日：1994-08-18

    申请号：KR1019910020269

    申请日：1991-11-14

    Applicant: 삼성전자주식회사

    Inventor： 원태영 ,  김문호 ,  유광동 ,  유지형

    IPC: H01L27/06

    CPC classification number: H01L21/8249 ,  Y10S148/009

    Abstract: The method manufactures a BiCMOS device having a bipolar transistor of which emitter and base are self aligned. The intrinsic base of a vertical type PNP transistor is formed by using an n+ polysilicon layer as a mask and the extrinsic base of a vertical type PNP transistor is formed by using the n+ polysilicon as a diffusion source. The self-aligned emitter of a vertical type PNP transistor is formed by using a side wall oxide layer for creating a lightly doped drain of a CMOS transistor.

    Abstract translation: 该方法制造BiCMOS器件，其具有发射极和基极自对准的双极晶体管。 通过使用n +多晶硅层作为掩模来形成垂直型PNP晶体管的本征基极，并且通过使用n +多晶硅作为扩散源形成垂直型PNP晶体管的非本征基极。 通过使用用于产生CMOS晶体管的轻掺杂漏极的侧壁氧化物层来形成垂直型PNP晶体管的自对准发射极。

    LGE(Laterally graded emitter) 바이폴라 소자의 제조방법
    18.
    发明授权
    LGE(Laterally graded emitter) 바이폴라 소자의 제조방법 失效
    大双极晶体管的制造方法

    公开(公告)号：KR1019940005731B1

    公开(公告)日：1994-06-23

    申请号：KR1019910011373

    申请日：1991-07-05

    Applicant: 삼성전자주식회사

    Inventor： 함석헌 ,  원태영 ,  박길서 ,  김문호

    IPC: H01L29/73

    Abstract: The method adjusts a diffusion velocity of impurity by time delay with a width of CVD oxidation layer, increases a current driving force of device, and maintains a performance of bipolar device by preventing a formation of trap in an oxidation layer. The method includes a process which forms a base area by heating, a process which reduces a specified area of a 1st nitrogen layer (15) and a 2nd oxidation layer (14), a process which forms a spacer (17) of a nitrogen layer, a process which etches a 1st oxidation layer, and a process which diffuses an emitter area (19) by heating procedure.

    Abstract translation: 该方法通过具有CVD氧化层的宽度的时间延迟来调整杂质的扩散速度，增加器件的电流驱动力，并且通过防止在氧化层中形成陷阱来保持双极器件的性能。 该方法包括通过加热形成基底区域的方法，减少第一氮层（15）和第二氧化层（14）的指定面积的过程，形成氮层的间隔物（17）的工艺 蚀刻第一氧化层的工艺，以及通过加热步骤扩散发射极区域（19）的工艺。

    고성능 횡방향 바이폴라 트랜지스터(BIPOLAR TRANSISTOR)의 제조방법
    20.
    发明授权
    고성능 횡방향 바이폴라 트랜지스터(BIPOLAR TRANSISTOR)의 제조방법 无效
    侧向双极晶体管的制造方法

    公开(公告)号：KR1019930000294B1

    公开(公告)日：1993-01-15

    申请号：KR1019890005930

    申请日：1989-05-02

    Applicant: 삼성전자주식회사

    Inventor： 고장만 ,  김문호

    IPC: H01L21/18 ,  H01L29/78

    Abstract: The method for integrating a bipolar NPN transistor and a lateral PNP transistor comprises forming a buried layer (2) on a substrate (1), forming an epitaxial layer (3) on the buried layer, forming a base region at one side of the epitaxial layer (3), dry-etching the other side of the layer (2) to form a inclined epitaxial surface (2) to form openings into the layer (2), implanting high concentration of impurity ions into the openings to form a diffusion layer (7), forming a polysilicon layer (10) having a low concentration of impurity thereon, to fill the openings with the polysilicon and diffusing the impurity of the polysilicon layer (10) into the epitaxial layer to form a low concentration of diffusion layer in self-alignment, thereby improving the current gain.

    Abstract translation: 用于积分双极NPN晶体管和横向PNP晶体管的方法包括在衬底（1）上形成掩埋层（2），在掩埋层上形成外延层（3），在外延层的一侧形成基极区域 层（3），干蚀刻层（2）的另一侧以形成倾斜的外延表面（2）以在层（2）中形成开口，将高浓度的杂质离子注入到开口中以形成扩散层 （7），在其上形成具有低浓度杂质的多晶硅层（10），以用多晶硅填充开口，并将多晶硅层（10）的杂质扩散到外延层中以形成低浓度的扩散层 自对准，从而提高电流增益。

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